acrn-hypervisor/hypervisor/boot
Sainath Grandhi f67ac09141 hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs
MADT is used to specify the GSI base for each IO-APIC and the number of
interrupt pins per IO-APIC is programmed into Max. Redir. Entry register of
that IO-APIC.

On platforms with multiple IO-APICs, there can be holes in the GSI space.
For example, on a platform with 2 IO-APICs, the following configuration has
a hole (from 24 to 31) in the GSI space.

IO-APIC 1: GSI base - 0, number of pins - 24
IO-APIC 2: GSI base - 32, number of pins - 8

This patch also adjusts the size for variables used to represent the total
number of IO-APICs on the system from uint16_t to uint8_t as the ACPI MADT
uses only 8-bits to indicate the unique IO-APIC IDs.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
..
guest hv: a few fixes for multiboot2 boot 2020-03-24 08:44:20 +08:00
include hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs 2020-03-25 09:36:18 +08:00
acpi_base.c hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs 2020-03-25 09:36:18 +08:00
cmdline.c HV: init and sanitize acrn multiboot info 2020-02-26 09:24:16 +08:00
multiboot.c hv: a few fixes for multiboot2 boot 2020-03-24 08:44:20 +08:00
multiboot2.c HV: init efi info with multiboot2 2020-02-26 09:24:16 +08:00
reloc.c hv: fixup relocation delta for symbols belong to entry section 2020-03-06 08:27:46 +08:00