f2bf3d3ed1
Now the GVT already tries to reserve the region. the problem is that the region should be reflected in PCI BUS0 memlimit32 and updated to DSDT table. As the GVT PCI bar0/2 is in reserved region and not updated to memlimit32 in DSDT table, the problem is triggered. Tracked-On: projectacrn#4227 Signed-off-by: Junming Liu <junming.liu@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> |
||
---|---|---|
.. | ||
arch/x86 | ||
bios | ||
core | ||
hw | ||
include | ||
lib | ||
log | ||
samples | ||
MAINTAINERS | ||
Makefile | ||
README.rst |
README.rst
ACRN Device Model ################# Introduction ============ The ACRN Device Model provides **device sharing** capabilities between the Service OS and Guest OSs. It is a component that is used in conjunction with the `ACRN Hypervisor`_ and this is installed within the Service OS. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/