acrn-hypervisor/devicemodel
Junming Liu f2bf3d3ed1 dm:gvt:update bus0 memlimit32 value
Now the GVT already tries to reserve the region.
the problem is that the region should be
reflected in PCI BUS0 memlimit32 and updated to DSDT table.

As the GVT PCI bar0/2 is in reserved region
and not updated to memlimit32 in DSDT table,
the problem is triggered.

Tracked-On: projectacrn#4227

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-12-12 09:04:30 +08:00
..
arch/x86 dm:use acrn-dm logger function instread of fprintf 2019-11-14 15:34:04 +08:00
bios Revert "Revert "OVMF release v1.4"" 2019-11-26 10:33:39 +08:00
core dm:gvt:reserve gvt bar regions in ACRN-DM 2019-12-05 11:20:11 +08:00
hw dm:gvt:update bus0 memlimit32 value 2019-12-12 09:04:30 +08:00
include dm:gvt:update gvt bars before other pci devices write bar address 2019-12-05 11:20:11 +08:00
lib dm: Fix some issues from string operations 2018-12-25 18:40:04 +08:00
log dm:use acrn-dm logger function instread of printf 2019-11-14 15:34:04 +08:00
samples DM: samples: Correct parameter of intel_pstate 2019-11-12 22:04:51 +08:00
MAINTAINERS update home page information 2018-05-15 17:19:39 +08:00
Makefile Makefile: add gcc flags to prevent some optimization 2019-12-10 10:02:15 +08:00
README.rst Documentation: clean-up of isolated README.rst files 2018-11-20 11:09:53 -08:00

README.rst

ACRN Device Model
#################

Introduction
============
The ACRN Device Model provides **device sharing** capabilities between the
Service OS and Guest OSs. It is a component that is used in conjunction with
the `ACRN Hypervisor`_ and this is installed within the Service OS. You can
find out more about Project ACRN on the `Project ACRN documentation`_ website.

.. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor
.. _`Project ACRN documentation`: https://projectacrn.github.io/