285 lines
7.0 KiB
C
285 lines
7.0 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef GDT_H
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#define GDT_H
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/* GDT is defined in assembly so it can be used to switch modes before long mode
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* is established.
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* With 64-bit EFI this is not required since are already in long mode when EFI
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* transfers control to the hypervisor. However, for any instantiation of the
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* ACRN Hypervisor that requires a boot from reset the GDT will be
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* used as mode transitions are being made to ultimately end up in long mode.
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* For this reason we establish the GDT in assembly.
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* This should not affect usage and convenience of interacting with the GDT in C
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* as the complete definition of the GDT is driven by the defines in this file.
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*
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* Unless it proves to be not viable we will use a single GDT for all hypervisor
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* CPUs, with space for per CPU LDT and TSS.
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*/
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/*
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* Segment selectors in x86-64 and i386 are the same size, 8 bytes.
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* Local Descriptor Table (LDT) selectors are 16 bytes on x86-64 instead of 8
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* bytes.
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* Task State Segment (TSS) selectors are 16 bytes on x86-64 instead of 8 bytes.
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*/
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#define X64_SEG_DESC_SIZE (0x8U) /* In long mode SEG Descriptors are 8 bytes */
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#define X64_LDT_DESC_SIZE (0x10U)/* In long mode LDT Descriptors are 16 bytes */
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#define X64_TSS_DESC_SIZE (0x10U)/* In long mode TSS Descriptors are 16 bytes */
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/*****************************************************************************
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*
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* BEGIN: Definition of the GDT.
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*
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* NOTE:
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* If you change the size of the GDT or rearrange the location of descriptors
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* within the GDT you must change both the defines and the C structure header.
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*
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*****************************************************************************/
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/* Number of global 8 byte segments descriptor(s) */
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#define HOST_GDT_RING0_SEG_SELECTORS (0x3U) /* rsvd, code, data */
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/* Offsets of global 8 byte segment descriptors */
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#define HOST_GDT_RING0_RSVD_SEL (0x0000U)
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#define HOST_GDT_RING0_CODE_SEL (0x0008U)
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#define HOST_GDT_RING0_DATA_SEL (0x0010U)
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/* Number of global 16 byte LDT descriptor(s) */
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#define HOST_GDT_RING0_TSS_SELECTORS (0x1U)
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/* One for each CPU in the hypervisor. */
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/*****************************************************************************
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*
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* END: Definition of the GDT.
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*
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*****************************************************************************/
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/* Offset to start of LDT Descriptors */
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#define HOST_GDT_RING0_LDT_SEL \
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(HOST_GDT_RING0_SEG_SELECTORS * X64_SEG_DESC_SIZE)
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/* Offset to start of LDT Descriptors */
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#define HOST_GDT_RING0_CPU_TSS_SEL (HOST_GDT_RING0_LDT_SEL)
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/* Size of the GDT */
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#define HOST_GDT_SIZE \
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(HOST_GDT_RING0_CPU_TSS_SEL + \
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(HOST_GDT_RING0_TSS_SELECTORS * X64_TSS_DESC_SIZE))
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/* Defined position of Interrupt Stack Tables */
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#define MACHINE_CHECK_IST (0x1)
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#define DOUBLE_FAULT_IST (0x2)
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#define STACK_FAULT_IST (0x3)
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#ifndef ASSEMBLER
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#include <types.h>
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#include <cpu.h>
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#define TSS_AVAIL (9)
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/*
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* Definition of an 8 byte code segment descriptor.
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*/
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union code_segment_descriptor {
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uint64_t value;
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struct {
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union {
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uint32_t value;
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struct {
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uint32_t limit_15_0:16;
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uint32_t base_15_0:16;
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} bits;
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} low32;
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union {
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uint32_t value;
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struct {
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uint32_t base_23_16:8;
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uint32_t accessed:1;
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uint32_t readeable:1;
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uint32_t conforming:1;
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uint32_t bit11_set:1;
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uint32_t bit12_set:1;
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uint32_t dpl:2;
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uint32_t present:1;
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uint32_t limit_19_16:4;
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uint32_t avl:1;
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uint32_t x64flag:1;
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uint32_t dflt:1;
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uint32_t granularity:1;
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uint32_t base_31_24:8;
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} bits;
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} high32;
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} fields;
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} __aligned(8);
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/*
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* Definition of an 8 byte data segment descriptor.
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*/
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union data_segment_descriptor {
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uint64_t value;
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struct {
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union {
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uint32_t value;
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struct {
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uint32_t limit_15_0:16;
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uint32_t base_15_0:16;
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} bits;
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} low32;
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union {
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uint32_t value;
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struct {
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uint32_t base_23_16:8;
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uint32_t accessed:1;
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uint32_t writeable:1;
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uint32_t expansion:1;
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uint32_t bit11_clr:1;
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uint32_t bit12_set:1;
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uint32_t dpl:2;
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uint32_t present:1;
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uint32_t limit_19_16:4;
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uint32_t avl:1;
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uint32_t rsvd_clr:1;
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uint32_t big:1;
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uint32_t granularity:1;
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uint32_t base_31_24:8;
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} bits;
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} high32;
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} fields;
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} __aligned(8);
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/*
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* Definition of an 8 byte system segment descriptor.
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*/
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union system_segment_descriptor {
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uint64_t value;
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struct {
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union {
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uint32_t value;
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struct {
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uint32_t limit_15_0:16;
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uint32_t base_15_0:16;
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} bits;
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} low32;
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union {
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uint32_t value;
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struct {
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uint32_t base_23_16:8;
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uint32_t type:4;
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uint32_t bit12_clr:1;
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uint32_t dpl:2;
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uint32_t present:1;
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uint32_t limit_19_16:4;
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uint32_t rsvd_1:1;
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uint32_t rsvd_2_clr:1;
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uint32_t rsvd_3:1;
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uint32_t granularity:1;
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uint32_t base_31_24:8;
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} bits;
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} high32;
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} fields;
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} __aligned(8);
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/*
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* Definition of 16 byte TSS and LDT selectors.
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*/
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union tss_64_descriptor {
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uint64_t value;
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struct {
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union {
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uint32_t value;
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struct {
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uint32_t limit_15_0:16;
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uint32_t base_15_0:16;
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} bits;
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} low32;
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union {
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uint32_t value;
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struct {
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uint32_t base_23_16:8;
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uint32_t type:4;
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uint32_t bit12_clr:1;
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uint32_t dpl:2;
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uint32_t present:1;
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uint32_t limit_19_16:4;
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uint32_t rsvd_1:1;
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uint32_t rsvd_2_clr:1;
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uint32_t rsvd_3:1;
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uint32_t granularity:1;
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uint32_t base_31_24:8;
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} bits;
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} high32;
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uint32_t base_addr_63_32;
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union {
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uint32_t value;
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struct {
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uint32_t rsvd_7_0:8;
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uint32_t bits_12_8_clr:4;
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uint32_t rsvd_31_13:20;
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} bits;
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} offset_12;
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} fields;
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} __aligned(8);
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/*****************************************************************************
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*
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* BEGIN: Definition of the GDT.
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*
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* NOTE:
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* If you change the size of the GDT or rearrange the location of descriptors
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* within the GDT you must change both the defines and the C structure header.
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*
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*****************************************************************************/
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struct host_gdt {
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uint64_t rsvd;
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union code_segment_descriptor host_gdt_code_descriptor;
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union data_segment_descriptor host_gdt_data_descriptor;
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union tss_64_descriptor host_gdt_tss_descriptors;
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} __aligned(8);
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/*****************************************************************************
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*
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* END: Definition of the GDT.
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*
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*****************************************************************************/
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/*
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* x86-64 Task State Segment (TSS) definition.
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*/
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struct tss_64 {
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uint32_t rsvd1;
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uint64_t rsp0;
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uint64_t rsp1;
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uint64_t rsp2;
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uint32_t rsvd2;
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uint32_t rsvd3;
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uint64_t ist1;
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uint64_t ist2;
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uint64_t ist3;
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uint64_t ist4;
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uint64_t ist5;
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uint64_t ist6;
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uint64_t ist7;
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uint32_t rsvd4;
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uint32_t rsvd5;
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uint16_t rsvd6;
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uint16_t io_map_base_addr;
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} __packed __aligned(16);
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/*
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* Definition of the GDT descriptor.
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*/
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struct host_gdt_descriptor {
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uint16_t len;
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struct host_gdt *gdt;
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} __packed;
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extern struct host_gdt HOST_GDT;
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extern struct host_gdt_descriptor HOST_GDTR;
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void load_gdtr_and_tr(void);
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#endif /* end #ifndef ASSEMBLER */
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#endif /* GDT_H */
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