143 lines
3.9 KiB
C
143 lines
3.9 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <acrn_hv_defs.h>
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#include <asm/page.h>
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#include <asm/e820.h>
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#include <asm/mmu.h>
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#include <multiboot.h>
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#include <logmsg.h>
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#include <asm/guest/ept.h>
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/*
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* e820.c contains the related e820 operations; like HV to get memory info for its MMU setup;
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* and hide HV memory from SOS_VM...
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*/
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static uint32_t hv_e820_entries_nr;
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/* Describe the memory layout the hypervisor uses */
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static struct e820_entry hv_e820[E820_MAX_ENTRIES];
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#define DBG_LEVEL_E820 6U
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/*
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* @brief reserve some RAM, hide it from sos_vm, return its start address
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* @param size_arg Amount of memory to be found and marked reserved
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* @param max_addr Maximum address below which memory is to be identified
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*
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* @pre hv_e820_entries_nr > 0U
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* @pre (size_arg & 0xFFFU) == 0U
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* @return base address of the memory region
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*/
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uint64_t e820_alloc_memory(uint32_t size_arg, uint64_t max_addr)
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{
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int32_t i;
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uint64_t size = size_arg;
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uint64_t ret = INVALID_HPA;
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struct e820_entry *entry, *new_entry;
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for (i = (int32_t)hv_e820_entries_nr - 1; i >= 0; i--) {
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entry = &hv_e820[i];
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uint64_t start, end, length;
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start = round_page_up(entry->baseaddr);
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end = round_page_down(entry->baseaddr + entry->length);
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length = (end > start) ? (end - start) : 0UL;
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if ((entry->type == E820_TYPE_RAM) && (length >= size) && ((start + size) <= max_addr)) {
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/* found exact size of e820 entry */
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if (length == size) {
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entry->type = E820_TYPE_RESERVED;
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ret = start;
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} else {
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/*
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* found entry with available memory larger than requested (length > size)
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* Reserve memory if
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* 1) hv_e820_entries_nr < E820_MAX_ENTRIES
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* 2) if end of this "entry" is <= max_addr
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* use memory from end of this e820 "entry".
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*/
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if ((hv_e820_entries_nr < E820_MAX_ENTRIES) && (end <= max_addr)) {
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new_entry = &hv_e820[hv_e820_entries_nr];
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new_entry->type = E820_TYPE_RESERVED;
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new_entry->baseaddr = end - size;
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new_entry->length = (entry->baseaddr + entry->length) - new_entry->baseaddr;
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/* Shrink the existing entry and total available memory */
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entry->length -= new_entry->length;
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hv_e820_entries_nr++;
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ret = new_entry->baseaddr;
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}
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}
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if (ret != INVALID_HPA) {
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break;
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}
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}
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}
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if ((ret == INVALID_HPA) || (ret == 0UL)) {
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/* current memory allocation algorithm is to find the available address from the highest
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* possible address below max_addr. if ret == 0, means all memory is used up and we have to
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* put the resource at address 0, this is dangerous.
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* Also ret == 0 would make code logic very complicated, since memcpy_s() doesn't support
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* address 0 copy.
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*/
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panic("Requested memory from E820 cannot be reserved!!");
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}
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return ret;
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}
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/* HV read multiboot header to get e820 entries info and calc total RAM info */
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void init_e820(void)
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{
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uint32_t i;
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uint64_t top_addr_space = CONFIG_PLATFORM_RAM_SIZE + PLATFORM_LO_MMIO_SIZE;
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struct acrn_multiboot_info *mbi = get_acrn_multiboot_info();
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struct multiboot_mmap *mmap = mbi->mi_mmap_entry;
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hv_e820_entries_nr = mbi->mi_mmap_entries;
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dev_dbg(DBG_LEVEL_E820, "mmap addr 0x%x entries %d\n",
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mbi->mi_mmap_entry, hv_e820_entries_nr);
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for (i = 0U; i < hv_e820_entries_nr; i++) {
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if (mmap[i].baseaddr >= top_addr_space) {
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mmap[i].length = 0UL;
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} else {
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if ((mmap[i].baseaddr + mmap[i].length) > top_addr_space) {
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mmap[i].length = top_addr_space - mmap[i].baseaddr;
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}
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}
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hv_e820[i].baseaddr = mmap[i].baseaddr;
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hv_e820[i].length = mmap[i].length;
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hv_e820[i].type = mmap[i].type;
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dev_dbg(DBG_LEVEL_E820, "mmap table: %d type: 0x%x", i, mmap[i].type);
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dev_dbg(DBG_LEVEL_E820, "Base: 0x%016lx length: 0x%016lx\n",
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mmap[i].baseaddr, mmap[i].length);
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}
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}
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uint32_t get_e820_entries_count(void)
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{
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return hv_e820_entries_nr;
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}
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const struct e820_entry *get_e820_entry(void)
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{
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return hv_e820;
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}
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