230 lines
5.7 KiB
C
230 lines
5.7 KiB
C
/*-
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* Copyright (c) 2017 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include "vmmapi.h"
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#include "sw_load.h"
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#include "dm.h"
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int with_bootargs;
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static char bootargs[STR_LEN];
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/*
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* Default e820 mem map:
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*
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* there is reserved memory hole for PCI hole and APIC etc
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* so the memory layout could be separated into lowmem & highmem.
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* - if request memory size <= ctx->lowmem_limit, then there is only
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* map[0]:0~ctx->lowmem for RAM
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* ctx->lowmem = request_memory_size
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* - if request memory size > ctx->lowmem_limit, then there are
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* map[0]:0~ctx->lowmem_limit & map[2]:4G~ctx->highmem for RAM
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* ctx->highmem = request_memory_size - ctx->lowmem_limit
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*
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* Begin End Type Length
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* 0: 0 - 0xF0000 RAM 0xF0000
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* 1 0xf0000 - 0x100000 (reserved) 0x10000
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* 2 0x100000 - lowmem RAM lowmem - 0x100000
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* 3: lowmem - bff_fffff (reserved) 0xc00_00000-lowmem
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* 4: 0xc00_00000 - dff_fffff PCI hole 512MB
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* 5: 0xe00_00000 - fff_fffff (reserved) 512MB
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* 6: 1_000_00000 - highmem RAM highmem-4G
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*/
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const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = {
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{ /* 0 to mptable/smbios/acpi */
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.baseaddr = 0x00000000,
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.length = 0xF0000,
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.type = E820_TYPE_RAM
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},
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{ /* mptable/smbios/acpi to lowmem */
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.baseaddr = 0xF0000,
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.length = 0x10000,
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.type = E820_TYPE_RESERVED
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},
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{ /* lowmem to lowmem_limit*/
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.baseaddr = 0x100000,
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.length = 0x48f00000,
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.type = E820_TYPE_RAM
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},
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{ /* lowmem to lowmem_limit*/
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.baseaddr = 0x49000000,
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.length = 0x77000000,
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.type = E820_TYPE_RESERVED
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},
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{ /* lowmem_limit to 4G */
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.baseaddr = 0xe0000000,
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.length = 0x20000000,
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.type = E820_TYPE_RESERVED
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},
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{
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.baseaddr = 0x100000000,
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.length = 0x000100000,
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.type = E820_TYPE_RESERVED
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},
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};
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int
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acrn_parse_bootargs(char *arg)
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{
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size_t len = strlen(arg);
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if (len < STR_LEN) {
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strncpy(bootargs, arg, len + 1);
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with_bootargs = 1;
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printf("SW_LOAD: get bootargs %s\n", bootargs);
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return 0;
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} else
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return -1;
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}
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char*
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get_bootargs(void)
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{
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return bootargs;
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}
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int
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check_image(char *path)
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{
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FILE *fp;
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fp = fopen(path, "r");
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if (fp == NULL)
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return -1;
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fclose(fp);
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return 0;
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}
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/* Assumption:
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* the range [start, start + size] belongs to one entry of e820 table
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*/
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int
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add_e820_entry(struct e820_entry *e820, int len, uint64_t start,
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uint64_t size, uint32_t type)
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{
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int i, length = len;
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uint64_t e_s, e_e;
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for (i = 0; i < len; i++) {
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e_s = e820[i].baseaddr;
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e_e = e820[i].baseaddr + e820[i].length;
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if ((e_s <= start) && ((start + size) <= e_e)) {
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int index_s = 0, index_e = 3;
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uint64_t pt[4];
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uint32_t pt_t[3];
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pt[0] = e_s;
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pt[1] = start;
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pt[2] = start + size;
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pt[3] = e_e;
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pt_t[0] = e820[i].type;
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pt_t[1] = type;
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pt_t[2] = e820[i].type;
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if (e_s == start) {
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index_s = 1;
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}
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if (e_e == (start + size)) {
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index_e = 2;
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}
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length += index_e - index_s - 1;
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if ((i != (len - 1) && ((index_e - index_s) > 1))) {
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memmove(&e820[i + index_e - index_s],
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&e820[i + 1], (len - i - 1) *
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sizeof(struct e820_entry));
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}
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for (; index_s < index_e; index_s++, i++) {
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e820[i].baseaddr = pt[index_s];
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e820[i].length = pt[index_s + 1] - pt[index_s];
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e820[i].type = pt_t[index_s];
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}
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break;
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}
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}
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return length;
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}
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uint32_t
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acrn_create_e820_table(struct vmctx *ctx, struct e820_entry *e820)
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{
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uint32_t k;
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memcpy(e820, e820_default_entries, sizeof(e820_default_entries));
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if (ctx->lowmem > 0) {
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e820[LOWRAM_E820_ENTRIES].length = ctx->lowmem -
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e820[LOWRAM_E820_ENTRIES].baseaddr;
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e820[LOWRAM_E820_ENTRIES+1].baseaddr = ctx->lowmem;
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e820[LOWRAM_E820_ENTRIES+1].length =
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ctx->lowmem_limit - ctx->lowmem;
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}
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if (ctx->highmem > 0) {
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e820[HIGHRAM_E820_ENTRIES].type = E820_TYPE_RAM;
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e820[HIGHRAM_E820_ENTRIES].length = ctx->highmem;
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}
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printf("SW_LOAD: build e820 %d entries to addr: %p\r\n",
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NUM_E820_ENTRIES, (void *)e820);
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for (k = 0; k < NUM_E820_ENTRIES; k++)
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printf("SW_LOAD: entry[%d]: addr 0x%016lx, size 0x%016lx, "
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" type 0x%x\r\n",
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k, e820[k].baseaddr,
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e820[k].length,
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e820[k].type);
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return NUM_E820_ENTRIES;
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}
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int
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acrn_sw_load(struct vmctx *ctx)
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{
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if (vsbl_file_name)
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return acrn_sw_load_vsbl(ctx);
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else
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return acrn_sw_load_bzimage(ctx);
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}
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