70 lines
1.7 KiB
C
70 lines
1.7 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _TPM_H_
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#define _TPM_H_
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#include "mmio_dev.h"
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#include "acpi.h"
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#define TPM_CRB_MMIO_ADDR 0xFED40000UL
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#define TPM_CRB_MMIO_SIZE 0x5000U
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uint32_t get_vtpm_crb_mmio_addr(void);
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uint32_t get_tpm_crb_mmio_addr(void);
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int basl_fwrite_tpm2(FILE *fp, struct vmctx *ctx);
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struct acpi_table_tpm2 {
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struct acpi_table_hdr header;
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uint16_t platform_class;
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uint16_t reserved;
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uint64_t control_address;
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uint32_t start_method;
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uint8_t start_method_spec_para[12];
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uint32_t laml;
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uint64_t lasa;
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} __attribute__((packed));
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/* TPM CRB registers */
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enum {
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CRB_REGS_LOC_STATE = 0x00,
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CRB_REGS_RESERVED0 = 0x04,
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CRB_REGS_LOC_CTRL = 0x08,
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CRB_REGS_LOC_STS = 0x0C,
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CRB_REGS_RESERVED1 = 0x10,
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CRB_REGS_INTF_ID_LO = 0x30,
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CRB_REGS_INTF_ID_HI = 0x34,
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CRB_REGS_CTRL_EXT_LO = 0x38,
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CRB_REGS_CTRL_EXT_HI = 0x3C,
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CRB_REGS_CTRL_REQ = 0x40,
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CRB_REGS_CTRL_STS = 0x44,
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CRB_REGS_CTRL_CANCEL = 0x48,
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CRB_REGS_CTRL_START = 0x4C,
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CRB_REGS_CTRL_INT_ENABLE = 0x50,
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CRB_REGS_CTRL_INT_STS = 0x54,
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CRB_REGS_CTRL_CMD_SIZE = 0x58,
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CRB_REGS_CTRL_CMD_PA_LO = 0x5C,
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CRB_REGS_CTRL_CMD_PA_HI = 0x60,
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CRB_REGS_CTRL_RSP_SIZE = 0x64,
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CRB_REGS_CTRL_RSP_PA = 0x68,
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CRB_DATA_BUFFER = 0x80
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};
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#define TPM_CRB_REG_SIZE (CRB_DATA_BUFFER)
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#define TPM_CRB_DATA_BUFFER_SIZE ((TPM_CRB_MMIO_SIZE) - (TPM_CRB_REG_SIZE))
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/* APIs by tpm.c */
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/* Initialize Virtual TPM2 */
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void init_vtpm2(struct vmctx *ctx);
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/* Deinitialize Virtual TPM2 */
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void deinit_vtpm2(struct vmctx *ctx);
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/* Parse Virtual TPM option from command line */
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int acrn_parse_vtpm2(char *arg);
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#endif
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