51 lines
2.0 KiB
C
51 lines
2.0 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer in
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* this position and unchanged.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __RPMB_SIM_H__
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#define __RPMB_SIM_H__
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static inline uint32_t swap32(uint32_t val)
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{
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return ((val & (uint32_t)0x000000ffUL) << 24)
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| ((val & (uint32_t)0x0000ff00UL) << 8)
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| ((val & (uint32_t)0x00ff0000UL) >> 8)
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| ((val & (uint32_t)0xff000000UL) >> 24);
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}
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static inline uint16_t swap16(uint16_t val)
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{
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return ((val & (uint16_t)0x00ffU) << 8)
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| ((val & (uint16_t)0xff00U) >> 8);
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}
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int rpmb_mac(const uint8_t *key, const struct rpmb_frame *frames,
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size_t frame_cnt, uint8_t *mac);
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int is_use_sim_rpmb(void);
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int rpmb_sim_key_init(uint8_t *key);
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int rpmb_sim_send(const void *r);
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#endif /* __RPMB_SIM_H__ */
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