acrn-hypervisor/hypervisor/include/dm
Li Fei1 a2fd8c5a9d pci: mcfg: limit device bus numbers which could access by ECAM
Per PCI Firmware Specification Revision 3.0, 4.1.2. MCFG Table Description:
Memory Mapped Enhanced Configuration Space Base Address Allocation Structure
assign the Start Bus Number and the End Bus Number which could decoded by the
Host Bridge. We should not access the PCI device which bus number outside of
the range of [Start Bus Number, End Bus Number).
For ACRN,  we should:
1. Don't detect PCI device which bus number outside the range of
[Start Bus Number, End Bus Number) of MCFG ACPI Table.
2. Only trap the ECAM MMIO size: [MMCFG_BASE_ADDRESS, MMCFG_BASE_ADDRESS +
(End Bus Number - Start Bus Number + 1) * 0x100000) for SOS.

Tracked-On: #5233

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-09 09:31:56 +08:00
..
io_req.h hv:refine vm & vcpu lock 2020-08-05 13:39:28 +08:00
ivshmem.h hv: implement ivshmem device creation and destruction 2020-08-28 16:53:12 +08:00
mmio_dev.h hv: mmio_dev: add hypercall to support mmio device pass through 2020-07-23 20:13:20 +08:00
vacpi.h pci: mcfg: limit device bus numbers which could access by ECAM 2020-09-09 09:31:56 +08:00
vgpio.h hv: add vgpio device model support 2020-09-07 14:52:02 +08:00
vioapic.h hv: add vgpio device model support 2020-09-07 14:52:02 +08:00
vpci.h pci: mcfg: limit device bus numbers which could access by ECAM 2020-09-09 09:31:56 +08:00
vpic.h hv[v2]: Remove deprecated term in vPIC submodule 2020-09-01 09:30:08 +08:00
vuart.h hv: Introduce Global System Interrupt (GSI) into INTx Remapping 2020-03-25 09:36:18 +08:00