acrn-hypervisor/hypervisor/include
Li Fei1 a2fd8c5a9d pci: mcfg: limit device bus numbers which could access by ECAM
Per PCI Firmware Specification Revision 3.0, 4.1.2. MCFG Table Description:
Memory Mapped Enhanced Configuration Space Base Address Allocation Structure
assign the Start Bus Number and the End Bus Number which could decoded by the
Host Bridge. We should not access the PCI device which bus number outside of
the range of [Start Bus Number, End Bus Number).
For ACRN,  we should:
1. Don't detect PCI device which bus number outside the range of
[Start Bus Number, End Bus Number) of MCFG ACPI Table.
2. Only trap the ECAM MMIO size: [MMCFG_BASE_ADDRESS, MMCFG_BASE_ADDRESS +
(End Bus Number - Start Bus Number + 1) * 0x100000) for SOS.

Tracked-On: #5233

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-09 09:31:56 +08:00
..
arch/x86 HV: add acpi module support for pre-launched VM 2020-09-08 19:52:25 +08:00
common hv: add new hypercalls to create and destroy an emulated device in hypervisor 2020-08-28 16:53:12 +08:00
debug hv: debug: Enable MMIO UART support 2020-08-27 13:31:17 +08:00
dm pci: mcfg: limit device bus numbers which could access by ECAM 2020-09-09 09:31:56 +08:00
hw pci: mcfg: limit device bus numbers which could access by ECAM 2020-09-09 09:31:56 +08:00
lib HV: enable multiboot module string as kernel bootargs 2020-06-08 13:30:04 +08:00
public hv: add new hypercalls to create and destroy an emulated device in hypervisor 2020-08-28 16:53:12 +08:00