159 lines
5.3 KiB
C
159 lines
5.3 KiB
C
/*
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* Copyright (c) 2011, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ACRNBOOT_H__
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#define __ACRNBOOT_H__
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#include "multiboot.h"
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#define E820_RAM 1
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#define E820_RESERVED 2
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#define E820_ACPI 3
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#define E820_NVS 4
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#define E820_UNUSABLE 5
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#define ERROR_STRING_LENGTH 32
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#define EFI_LOADER_SIGNATURE "EL64"
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#define ACPI_XSDT_ENTRY_SIZE (sizeof(UINT64))
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#define ACPI_NAME_SIZE 4
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#define ACPI_OEM_ID_SIZE 6
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#define ACPI_OEM_TABLE_ID_SIZE 8
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#define MSR_IA32_PAT 0x00000277 /* PAT */
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#define MSR_IA32_EFER 0xC0000080
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#define MSR_IA32_FS_BASE 0xC0000100U
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#define MSR_IA32_GS_BASE 0xC0000101
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#define MSR_IA32_SYSENTER_ESP 0x00000175 /* ESP for sysenter */
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#define MSR_IA32_SYSENTER_EIP 0x00000176 /* EIP for sysenter */
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/* Read MSR */
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#define CPU_MSR_READ(reg, msr_val_ptr) \
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{ \
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uint32_t msrl, msrh; \
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asm volatile ("rdmsr" : "=a"(msrl), \
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"=d"(msrh) : "c" (reg)); \
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*msr_val_ptr = ((uint64_t)msrh << 32U) | msrl; \
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}
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EFI_STATUS get_pe_section(CHAR8 *base, char *section, UINTN *vaddr, UINTN *size);
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typedef void(*hv_func)(int32_t, struct multiboot_info*);
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/*
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* We allocate memory for the following struct together with hyperivosr itself
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* memory allocation during boot.
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*/
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#define MBOOT_MMAP_NUMS 256
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#define MBOOT_MMAP_SIZE (sizeof(struct multiboot_mmap) * MBOOT_MMAP_NUMS)
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#define MBOOT_INFO_SIZE (sizeof(struct multiboot_info))
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#define BOOT_CTX_SIZE (sizeof(struct efi_context))
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#define EFI_BOOT_MEM_SIZE \
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(MBOOT_MMAP_SIZE + MBOOT_INFO_SIZE + BOOT_CTX_SIZE)
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#define MBOOT_MMAP_PTR(addr) \
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((struct multiboot_mmap *)((VOID *)(addr)))
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#define MBOOT_INFO_PTR(addr) \
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((struct multiboot_info *)((VOID *)(addr) + MBOOT_MMAP_SIZE))
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#define BOOT_CTX_PTR(addr) \
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((struct efi_context *)((VOID *)(addr) + MBOOT_MMAP_SIZE + MBOOT_INFO_SIZE))
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struct efi_info {
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UINT32 efi_loader_signature;
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UINT32 efi_systab;
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UINT32 efi_memdesc_size;
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UINT32 efi_memdesc_version;
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UINT32 efi_memmap;
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UINT32 efi_memmap_size;
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UINT32 efi_systab_hi;
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UINT32 efi_memmap_hi;
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};
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struct e820_entry {
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UINT64 addr; /* start of memory segment */
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UINT64 size; /* size of memory segment */
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UINT32 type; /* type of memory segment */
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} __attribute__((packed));
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struct acpi_table_rsdp {
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/* ACPI signature, contains "RSD PTR " */
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char signature[8];
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/* ACPI 1.0 checksum */
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UINT8 checksum;
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/* OEM identification */
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char oem_id[ACPI_OEM_ID_SIZE];
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/* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */
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UINT8 revision;
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/* 32-bit physical address of the RSDT */
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UINT32 rsdt_physical_address;
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/* Table length in bytes, including header (ACPI 2.0+) */
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UINT32 length;
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/* 64-bit physical address of the XSDT (ACPI 2.0+) */
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UINT64 xsdt_physical_address;
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/* Checksum of entire table (ACPI 2.0+) */
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UINT8 extended_checksum;
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/* Reserved, must be zero */
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UINT8 reserved[3];
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};
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struct acpi_table_header {
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/* ASCII table signature */
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char signature[ACPI_NAME_SIZE];
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/* Length of table in bytes, including this header */
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UINT32 length;
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/* ACPI Specification minor version number */
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UINT8 revision;
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/* To make sum of entire table == 0 */
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UINT8 checksum;
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/* ASCII OEM identification */
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char oem_id[ACPI_OEM_ID_SIZE];
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/* ASCII OEM table identification */
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char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
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/* OEM revision number */
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UINT32 oem_revision;
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/* ASCII ASL compiler vendor ID */
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char asl_compiler_id[ACPI_NAME_SIZE];
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/* ASL compiler version */
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UINT32 asl_compiler_revision;
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};
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static inline uint64_t
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msr_read(uint32_t reg_num)
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{
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uint64_t msr_val;
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CPU_MSR_READ(reg_num, &msr_val);
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return msr_val;
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}
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#endif
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