d96ab7ec90
According to PCIe specification (since 2.0), absence of any extended capabilities is required to be indicated by an extended capability header with a capability ID of FFFFh and a next capability offset of 000h. Thus, the board inspector today accesses the first extended capability header at 100h in the configuration space of a PCIe function unconditionally. However, in practice we have seen real PCI functions which has a PCIe capability but no extended capability header. This will cause the board inspector to crash due to invalid configuration space accesses. To fix that, this patch adds a check to the size of the configuration space before walking the extended capabilities of a PCIe function. Tracked-On: #6411 Signed-off-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> |
||
|---|---|---|
| .. | ||
| config_tools | ||
| debug_tools | ||
| efi-stub | ||
| hv_prebuild | ||
| packaging | ||
| services | ||
| Makefile | ||
| README.rst | ||
README.rst
ACRN Tools ########## The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". This folder holds the source to a number of tools that facilitate the management, debugging, profiling, and logging of multi-OS systems based on ACRN. You can find out more about Project ACRN and its set of tools on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`Project ACRN documentation`: https://projectacrn.github.io/