266 lines
6.8 KiB
C
266 lines
6.8 KiB
C
/*
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* hypercall definition
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*
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* Copyright (C) 2017 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file acrn_hv_defs.h
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*
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* @brief acrn data structure for hypercall
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*/
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#ifndef ACRN_HV_DEFS_H
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#define ACRN_HV_DEFS_H
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/*
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* Common structures for HV/VHM
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*/
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#define _HC_ID(x, y) (((x)<<24)|(y))
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#define HC_ID 0x80UL
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/* general */
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#define HC_ID_GEN_BASE 0x0UL
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#define HC_GET_API_VERSION _HC_ID(HC_ID, HC_ID_GEN_BASE + 0x00UL)
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/* VM management */
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#define HC_ID_VM_BASE 0x10UL
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#define HC_CREATE_VM _HC_ID(HC_ID, HC_ID_VM_BASE + 0x00UL)
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#define HC_DESTROY_VM _HC_ID(HC_ID, HC_ID_VM_BASE + 0x01UL)
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#define HC_START_VM _HC_ID(HC_ID, HC_ID_VM_BASE + 0x02UL)
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#define HC_PAUSE_VM _HC_ID(HC_ID, HC_ID_VM_BASE + 0x03UL)
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#define HC_CREATE_VCPU _HC_ID(HC_ID, HC_ID_VM_BASE + 0x04UL)
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/* IRQ and Interrupts */
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#define HC_ID_IRQ_BASE 0x20UL
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#define HC_ASSERT_IRQLINE _HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x00UL)
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#define HC_DEASSERT_IRQLINE _HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x01UL)
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#define HC_PULSE_IRQLINE _HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x02UL)
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#define HC_INJECT_MSI _HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL)
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/* DM ioreq management */
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#define HC_ID_IOREQ_BASE 0x30UL
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#define HC_SET_IOREQ_BUFFER _HC_ID(HC_ID, HC_ID_IOREQ_BASE + 0x00UL)
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#define HC_NOTIFY_REQUEST_FINISH _HC_ID(HC_ID, HC_ID_IOREQ_BASE + 0x01UL)
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/* Guest memory management */
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#define HC_ID_MEM_BASE 0x40UL
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#define HC_VM_SET_MEMMAP _HC_ID(HC_ID, HC_ID_MEM_BASE + 0x00UL)
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#define HC_VM_GPA2HPA _HC_ID(HC_ID, HC_ID_MEM_BASE + 0x01UL)
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#define HC_VM_SET_MEMMAPS _HC_ID(HC_ID, HC_ID_MEM_BASE + 0x02UL)
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/* PCI assignment*/
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#define HC_ID_PCI_BASE 0x50UL
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#define HC_ASSIGN_PTDEV _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x00UL)
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#define HC_DEASSIGN_PTDEV _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x01UL)
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#define HC_VM_PCI_MSIX_REMAP _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x02UL)
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#define HC_SET_PTDEV_INTR_INFO _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x03UL)
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#define HC_RESET_PTDEV_INTR_INFO _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x04UL)
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/* DEBUG */
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#define HC_ID_DBG_BASE 0x60UL
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#define HC_SETUP_SBUF _HC_ID(HC_ID, HC_ID_DBG_BASE + 0x00UL)
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/* Trusty */
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#define HC_ID_TRUSTY_BASE 0x70UL
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#define HC_INITIALIZE_TRUSTY _HC_ID(HC_ID, HC_ID_TRUSTY_BASE + 0x00UL)
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#define HC_WORLD_SWITCH _HC_ID(HC_ID, HC_ID_TRUSTY_BASE + 0x01UL)
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#define HC_GET_SEC_INFO _HC_ID(HC_ID, HC_ID_TRUSTY_BASE + 0x02UL)
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/* Power management */
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#define HC_ID_PM_BASE 0x80UL
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#define HC_PM_GET_CPU_STATE _HC_ID(HC_ID, HC_ID_PM_BASE + 0x00UL)
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#define ACRN_DOM0_VMID (0UL)
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#define ACRN_INVALID_VMID (-1)
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#define ACRN_INVALID_HPA (-1UL)
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/* Generic memory attributes */
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#define MEM_ACCESS_READ 0x00000001U
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#define MEM_ACCESS_WRITE 0x00000002U
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#define MEM_ACCESS_EXEC 0x00000004U
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#define MEM_ACCESS_RWX (MEM_ACCESS_READ | MEM_ACCESS_WRITE | \
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MEM_ACCESS_EXEC)
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#define MEM_ACCESS_RIGHT_MASK 0x00000007U
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#define MEM_TYPE_WB 0x00000040U
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#define MEM_TYPE_WT 0x00000080U
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#define MEM_TYPE_UC 0x00000100U
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#define MEM_TYPE_WC 0x00000200U
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#define MEM_TYPE_WP 0x00000400U
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#define MEM_TYPE_MASK 0x000007C0U
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/**
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* @brief Hypercall
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*
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* @defgroup acrn_hypercall ACRN Hypercall
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* @{
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*/
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/**
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* @brief Info to set ept mapping
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*
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* the parameter for HC_VM_SET_MEMMAP hypercall
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*/
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struct vm_set_memmap {
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#define MAP_MEM 0
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#define MAP_MMIO 1
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#define MAP_UNMAP 2
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/** map type: MAP_MEM, MAP_MMIO or MAP_UNMAP */
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uint32_t type;
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/** memory attributes: memory type + RWX access right */
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uint32_t prot;
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/** guest physical address to map */
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uint64_t remote_gpa;
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/** VM0's guest physcial address which remote gpa will be mapped to */
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uint64_t vm0_gpa;
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/** length of the map range */
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uint64_t length;
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/** old memory attributes(will be removed in the future):
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* memory type + RWX access right */
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uint32_t prot_2;
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} __aligned(8);
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struct memory_map {
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/** map type: MAP_MEM, MAP_MMIO or MAP_UNMAP */
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uint32_t type;
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/** memory attributes: memory type + RWX access right */
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uint32_t prot;
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/** guest physical address to map */
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uint64_t remote_gpa;
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/** VM0's guest physcial address which remote gpa will be mapped to */
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uint64_t vm0_gpa;
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/** length of the map range */
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uint64_t length;
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} __aligned(8);
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/**
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* multi memmap regions hypercall, used for HC_VM_SET_MEMMAPS
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*/
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struct set_memmaps {
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/** vmid for this hypercall */
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uint64_t vmid;
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/** multi memmaps numbers */
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uint32_t memmaps_num;
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/** the gpa of memmaps buffer, point to the memmaps array:
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* struct memory_map regions[memmaps_num]
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* the max buffer size is one page.
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*/
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uint64_t memmaps_gpa;
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} __attribute__((aligned(8)));
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/**
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* Setup parameter for share buffer, used for HC_SETUP_SBUF hypercall
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*/
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struct sbuf_setup_param {
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/** sbuf physical cpu id */
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uint16_t pcpu_id;
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/** sbuf id */
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uint32_t sbuf_id;
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/** sbuf's guest physical address */
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uint64_t gpa;
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} __aligned(8);
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/**
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* Gpa to hpa translation parameter, used for HC_VM_GPA2HPA hypercall
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*/
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struct vm_gpa2hpa {
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/** gpa to do translation */
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uint64_t gpa;
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/** hpa to return after translation */
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uint64_t hpa;
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} __aligned(8);
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/**
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* Intr mapping info per ptdev, the parameter for HC_SET_PTDEV_INTR_INFO
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* hypercall
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*/
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struct hc_ptdev_irq {
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#define IRQ_INTX 0
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#define IRQ_MSI 1
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#define IRQ_MSIX 2
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/** irq mapping type: INTX or MSI */
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uint32_t type;
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/** virtual BDF of the ptdev */
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uint16_t virt_bdf;
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/** physical BDF of the ptdev */
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uint16_t phys_bdf;
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union {
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/** INTX remapping info */
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struct {
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/** virtual IOAPIC/PIC pin */
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uint32_t virt_pin;
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/** physical IOAPIC pin */
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uint32_t phys_pin;
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/** is virtual pin from PIC */
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uint32_t pic_pin;
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} intx;
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/** MSIx remapping info */
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struct {
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/** vector count of MSI/MSIX */
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uint32_t vector_cnt;
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} msix;
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} is; /* irq source */
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} __aligned(8);
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/**
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* Hypervisor api version info, return it for HC_GET_API_VERSION hypercall
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*/
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struct hc_api_version {
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/** hypervisor api major version */
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uint32_t major_version;
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/** hypervisor api minor version */
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uint32_t minor_version;
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} __aligned(8);
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/**
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* Trusty boot params, used for HC_INITIALIZE_TRUSTY
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*/
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struct trusty_boot_param {
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/** sizeof this structure */
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uint32_t size_of_this_struct;
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/** version of this structure */
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uint32_t version;
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/** trusty runtime memory base address */
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uint32_t base_addr;
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/** trusty entry point */
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uint32_t entry_point;
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/** trusty runtime memory size */
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uint32_t mem_size;
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} __aligned(8);
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/**
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* @}
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*/
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#endif /* ACRN_HV_DEFS_H */
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