315 lines
8.6 KiB
C
315 lines
8.6 KiB
C
/*
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* Copyright (C) 2018-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <acrn_hv_defs.h>
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#include <asm/page.h>
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#include <asm/e820.h>
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#include <asm/mmu.h>
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#include <boot.h>
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#include <efi_mmap.h>
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#include <logmsg.h>
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#include <asm/guest/ept.h>
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/*
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* e820.c contains the related e820 operations; like HV to get memory info for its MMU setup;
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* and hide HV memory from Service VM...
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*/
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static uint32_t hv_e820_entries_nr;
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static uint64_t hv_e820_ram_size;
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/* Describe the memory layout the hypervisor uses */
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static struct e820_entry hv_e820[E820_MAX_ENTRIES];
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#define DBG_LEVEL_E820 6U
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/*
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* @brief reserve some RAM, hide it from Service VM, return its start address
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*
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* e820_alloc_memory requires 4k alignment, so size_arg will be converted
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* in the function.
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*
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* @param size_arg Amount of memory to be found and marked reserved
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* @param max_addr Maximum address below which memory is to be identified
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*
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* @pre hv_e820_entries_nr > 0U
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* @return base address of the memory region
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*/
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uint64_t e820_alloc_memory(uint64_t size_arg, uint64_t max_addr)
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{
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int32_t i;
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uint64_t size = round_page_up(size_arg);
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uint64_t ret = INVALID_HPA;
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struct e820_entry *entry, *new_entry;
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for (i = (int32_t)hv_e820_entries_nr - 1; i >= 0; i--) {
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entry = &hv_e820[i];
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uint64_t start, end, length;
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start = round_page_up(entry->baseaddr);
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end = round_page_down(entry->baseaddr + entry->length);
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length = (end > start) ? (end - start) : 0UL;
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if ((entry->type == E820_TYPE_RAM) && (length >= size) && ((start + size) <= max_addr)) {
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/* found exact size of e820 entry */
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if (length == size) {
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entry->type = E820_TYPE_RESERVED;
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ret = start;
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} else {
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/*
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* found entry with available memory larger than requested (length > size)
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* Reserve memory if
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* 1) hv_e820_entries_nr < E820_MAX_ENTRIES
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* 2) if end of this "entry" is <= max_addr
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* use memory from end of this e820 "entry".
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*/
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if ((hv_e820_entries_nr < E820_MAX_ENTRIES) && (end <= max_addr)) {
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new_entry = &hv_e820[hv_e820_entries_nr];
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new_entry->type = E820_TYPE_RESERVED;
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new_entry->baseaddr = end - size;
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new_entry->length = (entry->baseaddr + entry->length) - new_entry->baseaddr;
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/* Shrink the existing entry and total available memory */
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entry->length -= new_entry->length;
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hv_e820_entries_nr++;
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ret = new_entry->baseaddr;
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}
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}
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if (ret != INVALID_HPA) {
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break;
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}
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}
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}
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if ((ret == INVALID_HPA) || (ret == 0UL)) {
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/* current memory allocation algorithm is to find the available address from the highest
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* possible address below max_addr. if ret == 0, means all memory is used up and we have to
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* put the resource at address 0, this is dangerous.
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* Also ret == 0 would make code logic very complicated, since memcpy_s() doesn't support
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* address 0 copy.
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*/
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panic("Requested memory from E820 cannot be reserved!!");
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}
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return ret;
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}
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static void insert_e820_entry(uint32_t index, uint64_t addr, uint64_t length, uint64_t type)
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{
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uint32_t i;
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hv_e820_entries_nr++;
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ASSERT(hv_e820_entries_nr <= E820_MAX_ENTRIES, "e820 entry overflow");
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for (i = hv_e820_entries_nr - 1; i > index; i--) {
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hv_e820[i] = hv_e820[i-1];
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}
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hv_e820[index].baseaddr = addr;
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hv_e820[index].length = length;
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hv_e820[index].type = type;
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}
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static uint64_t e820_alloc_region(uint64_t addr, uint64_t size)
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{
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uint32_t i;
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uint64_t entry_start;
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uint64_t entry_end;
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uint64_t start_pa = round_page_down(addr);
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uint64_t end_pa = round_page_up(addr + size);
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struct e820_entry *entry;
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for (i = 0U; i < hv_e820_entries_nr; i++) {
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entry = &hv_e820[i];
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entry_start = entry->baseaddr;
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entry_end = entry->baseaddr + entry->length;
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/* No need handle in these cases*/
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if ((entry->type != E820_TYPE_RAM) || (entry_end <= start_pa) || (entry_start >= end_pa)) {
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continue;
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}
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if ((entry_start <= start_pa) && (entry_end >= end_pa)) {
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entry->length = start_pa - entry_start;
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/*
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* .......|start_pa... ....................End_pa|.....
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* |entry_start..............................entry_end|
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*/
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if (end_pa < entry_end) {
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insert_e820_entry(i + 1, end_pa, entry_end - end_pa, E820_TYPE_RAM);
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break;
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}
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} else {
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pr_err("This region not in one entry!");
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}
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}
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return addr;
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}
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static void init_e820_from_efi_mmap(void)
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{
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uint32_t i, e820_idx = 0U;
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const struct efi_memory_desc *efi_mmap_entry = get_efi_mmap_entry();
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for (i = 0U; i < get_efi_mmap_entries_count(); i++) {
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if (e820_idx >= E820_MAX_ENTRIES) {
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pr_err("Too many efi memmap entries !");
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break;
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}
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hv_e820[e820_idx].baseaddr = efi_mmap_entry[i].phys_addr;
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hv_e820[e820_idx].length = efi_mmap_entry[i].num_pages * PAGE_SIZE;
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/* The EFI BOOT Service releated regions need to be set to reserved and avoid being touched by
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* hypervisor, because at least below software modules rely on them:
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* 1. EFI ESRT(The EFI System Resource Table) which used for UEFI firmware upgrade;
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* 2. Image resource in ACPI BGRT(Boottime Graphics Resource Table) which used for boot time logo;
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*/
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switch (efi_mmap_entry[i].type) {
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case EFI_LOADER_CODE:
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case EFI_LOADER_DATA:
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case EFI_CONVENTIONAL_MEMORY:
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if ((efi_mmap_entry[i].attribute & EFI_MEMORY_WB) != 0UL) {
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hv_e820[e820_idx].type = E820_TYPE_RAM;
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} else {
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hv_e820[e820_idx].type = E820_TYPE_RESERVED;
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}
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break;
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case EFI_UNUSABLE_MEMORY:
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hv_e820[e820_idx].type = E820_TYPE_UNUSABLE;
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break;
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case EFI_ACPI_RECLAIM_MEMORY:
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hv_e820[e820_idx].type = E820_TYPE_ACPI_RECLAIM;
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break;
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case EFI_ACPI_MEMORY_NVS:
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hv_e820[e820_idx].type = E820_TYPE_ACPI_NVS;
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break;
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/* case EFI_RESERVED_MEMORYTYPE:
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* case EFI_BOOT_SERVICES_CODE:
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* case EFI_BOOT_SERVICES_DATA:
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* case EFI_RUNTIME_SERVICES_CODE:
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* case EFI_RUNTIME_SERVICES_DATA:
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* case EFI_MEMORYMAPPED_IO:
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* case EFI_MEMORYMAPPED_IOPORTSPACE:
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* case EFI_PALCODE:
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* case EFI_PERSISTENT_MEMORY:
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*/
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default:
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hv_e820[e820_idx].type = E820_TYPE_RESERVED;
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break;
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}
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/* Given the efi memmap has been sorted, the hv_e820[] is also sorted.
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* Then the algorithm is very simple, just merge with previous mmap entry
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* if type is same and base addr is continuous.
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*/
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if ((e820_idx > 0U) && (hv_e820[e820_idx].type == hv_e820[e820_idx - 1U].type)
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&& (hv_e820[e820_idx].baseaddr ==
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(hv_e820[e820_idx - 1U].baseaddr
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+ hv_e820[e820_idx - 1U].length))) {
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hv_e820[e820_idx - 1U].length += hv_e820[e820_idx].length;
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} else {
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dev_dbg(DBG_LEVEL_E820, "efi mmap hv_e820[%d]: type: 0x%x Base: 0x%016lx length: 0x%016lx",
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e820_idx, hv_e820[e820_idx].type, hv_e820[e820_idx].baseaddr, hv_e820[e820_idx].length);
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e820_idx ++;
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}
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}
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hv_e820_entries_nr = e820_idx;
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}
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/* HV read multiboot header to get e820 entries info and calc total RAM info */
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static void init_e820_from_mmap(struct acrn_boot_info *abi)
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{
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uint32_t i;
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struct abi_mmap *mmap = abi->mmap_entry;
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hv_e820_entries_nr = abi->mmap_entries;
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dev_dbg(DBG_LEVEL_E820, "mmap addr 0x%x entries %d\n",
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abi->mmap_entry, hv_e820_entries_nr);
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for (i = 0U; i < hv_e820_entries_nr; i++) {
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hv_e820[i].baseaddr = mmap[i].baseaddr;
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hv_e820[i].length = mmap[i].length;
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hv_e820[i].type = mmap[i].type;
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dev_dbg(DBG_LEVEL_E820, "mmap hv_e820[%d]: type: 0x%x Base: 0x%016lx length: 0x%016lx", i,
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mmap[i].type, mmap[i].baseaddr, mmap[i].length);
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}
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}
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static void calculate_e820_ram_size(void)
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{
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uint32_t i;
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for(i = 0; i < hv_e820_entries_nr; i++){
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dev_dbg(DBG_LEVEL_E820, "hv_e820[%d]:type: 0x%x Base: 0x%016lx length: 0x%016lx", i,
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hv_e820[i].type, hv_e820[i].baseaddr, hv_e820[i].length);
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if (hv_e820[i].type == E820_TYPE_RAM) {
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hv_e820_ram_size += hv_e820[i].baseaddr + hv_e820[i].length;
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}
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}
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dev_dbg(DBG_LEVEL_E820, "ram size: 0x%016lx ",hv_e820_ram_size);
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}
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static void alloc_mods_memory(void)
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{
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uint32_t i;
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int64_t mod_start = 0UL;
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struct acrn_boot_info *abi = get_acrn_boot_info();
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for (i = 0; i < abi->mods_count; i++) {
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mod_start = hva2hpa(abi->mods[i].start);
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e820_alloc_region(mod_start, abi->mods[i].size);
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}
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}
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void init_e820(void)
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{
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struct acrn_boot_info *abi = get_acrn_boot_info();
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if (boot_from_uefi(abi)) {
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init_efi_mmap_entries(&abi->uefi_info);
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init_e820_from_efi_mmap();
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} else {
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init_e820_from_mmap(abi);
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}
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calculate_e820_ram_size();
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/* reserve multiboot modules memory */
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alloc_mods_memory();
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}
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uint64_t get_e820_ram_size(void)
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{
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return hv_e820_ram_size;
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}
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uint32_t get_e820_entries_count(void)
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{
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return hv_e820_entries_nr;
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}
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const struct e820_entry *get_e820_entry(void)
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{
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return hv_e820;
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}
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