2397 lines
91 KiB
XML
2397 lines
91 KiB
XML
<acrn-config board="adl-asrock">
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<BIOS_INFO>
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BIOS Information
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Vendor: American Megatrends International, LLC.
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Version: P1.20B
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Release Date: 10/14/2022
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BIOS Revision: 5.25
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</BIOS_INFO>
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<BASE_BOARD_INFO>
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Base Board Information
|
|
Manufacturer: ASRock Industrial
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Product Name: DSB-1210-WT
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Version: To Be Filled By O.E.M.
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</BASE_BOARD_INFO>
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<PCI_DEVICE>
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00:00.0 Host bridge: Intel Corporation 12th Gen Core Processor Host Bridge/DRAM Registers (rev 02)
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Region 3: Memory at <ignored> (32-bit, non-prefetchable)
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00:02.0 VGA compatible controller: Intel Corporation AlderLake-S GT1 (rev 0c)
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Region 0: Memory at 6000000000 (64-bit, non-prefetchable) [size=16M]
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Region 2: Memory at 4000000000 (64-bit, prefetchable) [size=256M]
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Region 0: Memory at 0000004010000000 (64-bit, non-prefetchable)
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Region 2: Memory at 0000004020000000 (64-bit, prefetchable)
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00:06.0 PCI bridge: Intel Corporation 12th Gen Core Processor PCI Express x4 Controller #0 (rev 02)
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00:14.0 USB controller: Intel Corporation Alder Lake-S PCH USB 3.2 Gen 2x2 XHCI Controller (rev 11)
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Region 0: Memory at 6001100000 (64-bit, non-prefetchable) [size=64K]
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00:14.2 RAM memory: Intel Corporation Alder Lake-S PCH Shared SRAM (rev 11)
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Region 0: Memory at 6001114000 (64-bit, non-prefetchable) [disabled] [size=16K]
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Region 2: Memory at 600111c000 (64-bit, non-prefetchable) [disabled] [size=4K]
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00:16.0 Communication controller: Intel Corporation Alder Lake-S PCH HECI Controller #1 (rev 11)
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Region 0: Memory at 600111b000 (64-bit, non-prefetchable) [size=4K]
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00:16.3 Serial controller: Intel Corporation Device 7aeb (rev 11)
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Region 1: Memory at 81304000 (32-bit, non-prefetchable) [size=4K]
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00:17.0 SATA controller: Intel Corporation Alder Lake-S PCH SATA Controller [AHCI Mode] (rev 11)
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Region 0: Memory at 81300000 (32-bit, non-prefetchable) [size=8K]
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Region 1: Memory at 81303000 (32-bit, non-prefetchable) [size=256]
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Region 5: Memory at 81302000 (32-bit, non-prefetchable) [size=2K]
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00:1c.0 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #1 (rev 11)
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00:1c.2 PCI bridge: Intel Corporation Device 7aba (rev 11)
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00:1c.3 PCI bridge: Intel Corporation Device 7abb (rev 11)
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00:1c.4 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #5 (rev 11)
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00:1c.7 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #8 (rev 11)
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00:1d.0 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #9 (rev 11)
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00:1d.6 PCI bridge: Intel Corporation Device 7ab6 (rev 11)
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00:1e.0 Communication controller: Intel Corporation Alder Lake-S PCH Serial IO UART #0 (rev 11)
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Region 0: Memory at 4017000000 (64-bit, non-prefetchable) [size=4K]
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00:1e.3 Serial bus controller: Intel Corporation Alder Lake-S PCH Serial IO SPI Controller #1 (rev 11)
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Region 0: Memory at 4017001000 (64-bit, non-prefetchable) [virtual] [size=4K]
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00:1f.0 ISA bridge: Intel Corporation Device 7a90 (rev 11)
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00:1f.3 Audio device: Intel Corporation Alder Lake-S HD Audio Controller (rev 11)
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Region 0: Memory at 6001110000 (64-bit, non-prefetchable) [size=16K]
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Region 4: Memory at 6001000000 (64-bit, non-prefetchable) [size=1M]
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00:1f.4 SMBus: Intel Corporation Alder Lake-S PCH SMBus Controller (rev 11)
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Region 0: Memory at 6001118000 (64-bit, non-prefetchable) [size=256]
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00:1f.5 Serial bus controller: Intel Corporation Alder Lake-S PCH SPI Controller (rev 11)
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Region 0: Memory at 81305000 (32-bit, non-prefetchable) [size=4K]
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01:00.0 Non-Volatile memory controller: Kingston Technology Company, Inc. OM3PDP3 NVMe SSD (rev 01)
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Region 0: Memory at 81200000 (64-bit, non-prefetchable) [size=16K]
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03:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM (rev 03)
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Region 0: Memory at 81000000 (32-bit, non-prefetchable) [size=1M]
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Region 3: Memory at 81100000 (32-bit, non-prefetchable) [size=16K]
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04:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM (rev 03)
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Region 0: Memory at 80e00000 (32-bit, non-prefetchable) [size=1M]
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Region 3: Memory at 80f00000 (32-bit, non-prefetchable) [size=16K]
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05:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM (rev 03)
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Region 0: Memory at 80c00000 (32-bit, non-prefetchable) [size=1M]
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Region 3: Memory at 80d00000 (32-bit, non-prefetchable) [size=16K]
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06:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM (rev 03)
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Region 0: Memory at 80a00000 (32-bit, non-prefetchable) [size=1M]
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Region 3: Memory at 80b00000 (32-bit, non-prefetchable) [size=16K]
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08:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM (rev 03)
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Region 0: Memory at 80800000 (32-bit, non-prefetchable) [size=1M]
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Region 3: Memory at 80900000 (32-bit, non-prefetchable) [size=16K]
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</PCI_DEVICE>
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<PCI_VID_PID>
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00:00.0 0600: 8086:4668 (rev 02)
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00:02.0 0300: 8086:4680 (rev 0c)
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00:06.0 0604: 8086:464d (rev 02)
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00:14.0 0c03: 8086:7ae0 (rev 11)
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00:14.2 0500: 8086:7aa7 (rev 11)
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00:16.0 0780: 8086:7ae8 (rev 11)
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00:16.3 0700: 8086:7aeb (rev 11)
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00:17.0 0106: 8086:7ae2 (rev 11)
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00:1c.0 0604: 8086:7ab8 (rev 11)
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00:1c.2 0604: 8086:7aba (rev 11)
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00:1c.3 0604: 8086:7abb (rev 11)
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00:1c.4 0604: 8086:7abc (rev 11)
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00:1c.7 0604: 8086:7abf (rev 11)
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00:1d.0 0604: 8086:7ab0 (rev 11)
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00:1d.6 0604: 8086:7ab6 (rev 11)
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00:1e.0 0780: 8086:7aa8 (rev 11)
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00:1e.3 0c80: 8086:7aab (rev 11)
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00:1f.0 0601: 8086:7a90 (rev 11)
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00:1f.3 0403: 8086:7ad0 (rev 11)
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00:1f.4 0c05: 8086:7aa3 (rev 11)
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00:1f.5 0c80: 8086:7aa4 (rev 11)
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01:00.0 0108: 2646:500d (rev 01)
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03:00.0 0200: 8086:15f2 (rev 03)
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04:00.0 0200: 8086:15f2 (rev 03)
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05:00.0 0200: 8086:15f2 (rev 03)
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06:00.0 0200: 8086:15f2 (rev 03)
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08:00.0 0200: 8086:15f2 (rev 03)
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</PCI_VID_PID>
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<WAKE_VECTOR_INFO>
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#define WAKE_VECTOR_32 0x758BA00CUL
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#define WAKE_VECTOR_64 0x758BA018UL
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</WAKE_VECTOR_INFO>
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<RESET_REGISTER_INFO>
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#define RESET_REGISTER_ADDRESS 0xCF9UL
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#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO
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#define RESET_REGISTER_VALUE 0x6U
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</RESET_REGISTER_INFO>
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<PM_INFO>
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0x20U
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#define PM1A_EVT_BIT_OFFSET 0x0U
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#define PM1A_EVT_ADDRESS 0x1800UL
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#define PM1A_EVT_ACCESS_SIZE 0x2U
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_EVT_BIT_WIDTH 0x0U
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#define PM1B_EVT_BIT_OFFSET 0x0U
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#define PM1B_EVT_ADDRESS 0x0UL
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#define PM1B_EVT_ACCESS_SIZE 0x2U
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0x10U
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#define PM1A_CNT_BIT_OFFSET 0x0U
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#define PM1A_CNT_ADDRESS 0x1804UL
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#define PM1A_CNT_ACCESS_SIZE 0x2U
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_CNT_BIT_WIDTH 0x0U
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#define PM1B_CNT_BIT_OFFSET 0x0U
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#define PM1B_CNT_ADDRESS 0x0UL
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#define PM1B_CNT_ACCESS_SIZE 0x2U
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</PM_INFO>
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<S3_INFO>
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#define S3_PKG_VAL_PM1A 0x5U
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#define S3_PKG_VAL_PM1B 0U
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#define S3_PKG_RESERVED 0x0U
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</S3_INFO>
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<S5_INFO>
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#define S5_PKG_VAL_PM1A 0x7U
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#define S5_PKG_VAL_PM1B 0U
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#define S5_PKG_RESERVED 0x0U
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</S5_INFO>
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<DRHD_INFO>
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#define DRHD_COUNT 2U
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#define DRHD0_DEV_CNT 0x1U
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#define DRHD0_SEGMENT 0x0U
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#define DRHD0_FLAGS 0x0U
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#define DRHD0_REG_BASE 0xFED90000UL
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#define DRHD0_IGNORE true
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#define DRHD0_DEVSCOPE0_TYPE 0x1U
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#define DRHD0_DEVSCOPE0_ID 0x0U
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#define DRHD0_DEVSCOPE0_BUS 0x0U
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#define DRHD0_DEVSCOPE0_PATH 0x10U
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#define DRHD1_DEV_CNT 0x2U
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#define DRHD1_SEGMENT 0x0U
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#define DRHD1_FLAGS 0x1U
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#define DRHD1_REG_BASE 0xFED91000UL
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#define DRHD1_IGNORE false
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#define DRHD1_DEVSCOPE0_TYPE 0x3U
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#define DRHD1_DEVSCOPE0_ID 0x2U
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#define DRHD1_DEVSCOPE0_BUS 0x0U
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#define DRHD1_DEVSCOPE0_PATH 0xf7U
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#define DRHD1_DEVSCOPE1_TYPE 0x4U
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#define DRHD1_DEVSCOPE1_ID 0x0U
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#define DRHD1_DEVSCOPE1_BUS 0x0U
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#define DRHD1_DEVSCOPE1_PATH 0xf6U
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</DRHD_INFO>
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<CPU_BRAND>
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"12th Gen Intel(R) Core(TM) i7-12700E"
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</CPU_BRAND>
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<CX_INFO>
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/* Cx data is not available */
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</CX_INFO>
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<PX_INFO>
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/* Px data is not available */
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</PX_INFO>
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<MMCFG_BASE_INFO>
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/* PCI mmcfg base of MCFG */
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#define DEFAULT_PCI_MMCFG_BASE 0xc0000000UL
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</MMCFG_BASE_INFO>
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<TPM_INFO>
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TPM2
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</TPM_INFO>
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<CLOS_INFO>
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rdt resources supported: L2
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rdt resource clos max: 8
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rdt resource mask max: '0x3ff'
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</CLOS_INFO>
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<IOMEM_INFO>
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00000000-00000fff : Reserved
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00001000-0009dfff : System RAM
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0009e000-0009efff : Reserved
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0009f000-0009ffff : System RAM
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000a0000-000fffff : Reserved
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000a0000-000bffff : PCI Bus 0000:00
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000e0000-000e3fff : PCI Bus 0000:00
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000e4000-000e7fff : PCI Bus 0000:00
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000e8000-000ebfff : PCI Bus 0000:00
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000ec000-000effff : PCI Bus 0000:00
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000f0000-000fffff : System ROM
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00100000-2007ffff : System RAM
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|
20080000-20080fff : Reserved
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|
20081000-69167fff : System RAM
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|
69168000-69168fff : Reserved
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69169000-725bffff : System RAM
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725c0000-756bffff : Reserved
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|
756c0000-7578efff : ACPI Tables
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7578f000-758bafff : ACPI Non-volatile Storage
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758bb000-75ffefff : Reserved
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|
75fff000-75ffffff : System RAM
|
|
76000000-79ffffff : Reserved
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|
7a600000-7a7fffff : Reserved
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|
7b000000-807fffff : Reserved
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|
7c800000-807fffff : Graphics Stolen Memory
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|
80800000-bfffffff : PCI Bus 0000:00
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|
80800000-809fffff : PCI Bus 0000:08
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80800000-808fffff : 0000:08:00.0
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80800000-808fffff : igc
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80900000-80903fff : 0000:08:00.0
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80900000-80903fff : igc
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80a00000-80bfffff : PCI Bus 0000:06
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80a00000-80afffff : 0000:06:00.0
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80a00000-80afffff : igc
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80b00000-80b03fff : 0000:06:00.0
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80b00000-80b03fff : igc
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|
80c00000-80dfffff : PCI Bus 0000:05
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80c00000-80cfffff : 0000:05:00.0
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80c00000-80cfffff : igc
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80d00000-80d03fff : 0000:05:00.0
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80d00000-80d03fff : igc
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|
80e00000-80ffffff : PCI Bus 0000:04
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|
80e00000-80efffff : 0000:04:00.0
|
|
80e00000-80efffff : igc
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|
80f00000-80f03fff : 0000:04:00.0
|
|
80f00000-80f03fff : igc
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|
81000000-811fffff : PCI Bus 0000:03
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|
81000000-810fffff : 0000:03:00.0
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|
81000000-810fffff : igc
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|
81100000-81103fff : 0000:03:00.0
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|
81100000-81103fff : igc
|
|
81200000-812fffff : PCI Bus 0000:01
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|
81200000-81203fff : 0000:01:00.0
|
|
81200000-81203fff : nvme
|
|
81300000-81301fff : 0000:00:17.0
|
|
81300000-81301fff : ahci
|
|
81302000-813027ff : 0000:00:17.0
|
|
81302000-813027ff : ahci
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|
81303000-813030ff : 0000:00:17.0
|
|
81303000-813030ff : ahci
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|
81304000-81304fff : 0000:00:16.3
|
|
81305000-81305fff : 0000:00:1f.5
|
|
c0000000-cfffffff : PCI MMCONFIG 0000 [bus 00-ff]
|
|
c0000000-cfffffff : Reserved
|
|
fe000000-fe010fff : Reserved
|
|
fec00000-fec00fff : Reserved
|
|
fec00000-fec003ff : IOAPIC 0
|
|
fed00000-fed00fff : Reserved
|
|
fed00000-fed003ff : HPET 0
|
|
fed00000-fed003ff : PNP0103:00
|
|
fed20000-fed7ffff : Reserved
|
|
fed40000-fed44fff : MSFT0101:00
|
|
fed40000-fed44fff : MSFT0101:00 MSFT0101:00
|
|
fed90000-fed93fff : pnp 00:09
|
|
feda0000-feda0fff : pnp 00:09
|
|
feda1000-feda1fff : pnp 00:09
|
|
fedc0000-fedc7fff : pnp 00:09
|
|
fee00000-fee00fff : Local APIC
|
|
fee00000-fee00fff : Reserved
|
|
ff000000-ffffffff : Reserved
|
|
100000000-87f7fffff : System RAM
|
|
1e1000000-1e2404206 : Kernel code
|
|
1e2600000-1e2da6fff : Kernel rodata
|
|
1e2e00000-1e314c43f : Kernel data
|
|
1e334b000-1e39fffff : Kernel bss
|
|
87f800000-87fffffff : RAM buffer
|
|
4000000000-7fffffffff : PCI Bus 0000:00
|
|
4000000000-400fffffff : 0000:00:02.0
|
|
4010000000-4016ffffff : 0000:00:02.0
|
|
4017000000-4017000fff : 0000:00:1e.0
|
|
4017000000-40170001ff : lpss_dev
|
|
4017000000-401700001f : serial
|
|
4017000200-40170002ff : lpss_priv
|
|
4017000800-4017000fff : idma64.0
|
|
4017000800-4017000fff : idma64.0 idma64.0
|
|
4017001000-4017001fff : 0000:00:1e.3
|
|
4017001000-40170011ff : lpss_dev
|
|
4017001000-40170011ff : pxa2xx-spi.1 lpss_dev
|
|
4017001200-40170012ff : lpss_priv
|
|
4017001800-4017001fff : idma64.1
|
|
4017001800-4017001fff : idma64.1 idma64.1
|
|
4020000000-40ffffffff : 0000:00:02.0
|
|
6000000000-6000ffffff : 0000:00:02.0
|
|
6001000000-60010fffff : 0000:00:1f.3
|
|
6001100000-600110ffff : 0000:00:14.0
|
|
6001100000-600110ffff : xhci-hcd
|
|
6001110000-6001113fff : 0000:00:1f.3
|
|
6001110000-6001113fff : ICH HD audio
|
|
6001114000-6001117fff : 0000:00:14.2
|
|
6001118000-60011180ff : 0000:00:1f.4
|
|
600111b000-600111bfff : 0000:00:16.0
|
|
600111b000-600111bfff : mei_me
|
|
600111c000-600111cfff : 0000:00:14.2
|
|
</IOMEM_INFO>
|
|
<BLOCK_DEVICE_INFO>
|
|
/dev/nvme0n1p2: TYPE="ext4"
|
|
</BLOCK_DEVICE_INFO>
|
|
<TTYS_INFO>
|
|
seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
|
|
seri:/dev/ttyS1 type:portio base:0x2F8 irq:3
|
|
seri:/dev/ttyS2 type:portio base:0x3E8 irq:7
|
|
seri:/dev/ttyS3 type:portio base:0x2E8 irq:7
|
|
seri:/dev/ttyS4 type:portio base:0x2E0 irq:10
|
|
seri:/dev/ttyS5 type:portio base:0x2F0 irq:10
|
|
seri:/dev/ttyS6 type:portio base:0x30A0 irq:19 bdf:0:22.3
|
|
seri:/dev/ttyS7 type:mmio base:0x4017000000 irq:16 bdf:"00:1e.0"
|
|
</TTYS_INFO>
|
|
<AVAILABLE_IRQ_INFO>
|
|
5, 6, 11, 12, 13, 14, 15
|
|
</AVAILABLE_IRQ_INFO>
|
|
<TOTAL_MEM_INFO>
|
|
32642608 kB
|
|
</TOTAL_MEM_INFO>
|
|
<CPU_PROCESSOR_INFO>
|
|
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
|
|
</CPU_PROCESSOR_INFO>
|
|
<MAX_MSIX_TABLE_NUM>
|
|
9
|
|
</MAX_MSIX_TABLE_NUM>
|
|
<processors>
|
|
<model description="12th Gen Intel(R) Core(TM) i7-12700E">
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<capability id="sse3"/>
|
|
<capability id="pclmulqdq"/>
|
|
<capability id="dtes64"/>
|
|
<capability id="monitor"/>
|
|
<capability id="ds_cpl"/>
|
|
<capability id="vmx"/>
|
|
<capability id="smx"/>
|
|
<capability id="est"/>
|
|
<capability id="tm2"/>
|
|
<capability id="ssse3"/>
|
|
<capability id="sdbg"/>
|
|
<capability id="fma"/>
|
|
<capability id="cmpxchg16b"/>
|
|
<capability id="xtpr"/>
|
|
<capability id="pdcm"/>
|
|
<capability id="pcid"/>
|
|
<capability id="sse4_1"/>
|
|
<capability id="sse4_2"/>
|
|
<capability id="x2apic"/>
|
|
<capability id="movbe"/>
|
|
<capability id="popcnt"/>
|
|
<capability id="tsc_deadline"/>
|
|
<capability id="aes"/>
|
|
<capability id="xsave"/>
|
|
<capability id="avx"/>
|
|
<capability id="f16c"/>
|
|
<capability id="rdrand"/>
|
|
<capability id="fpu"/>
|
|
<capability id="vme"/>
|
|
<capability id="de"/>
|
|
<capability id="pse"/>
|
|
<capability id="tsc"/>
|
|
<capability id="msr"/>
|
|
<capability id="pae"/>
|
|
<capability id="mce"/>
|
|
<capability id="cx8"/>
|
|
<capability id="apic"/>
|
|
<capability id="sep"/>
|
|
<capability id="mtrr"/>
|
|
<capability id="pge"/>
|
|
<capability id="mca"/>
|
|
<capability id="cmov"/>
|
|
<capability id="pat"/>
|
|
<capability id="pse36"/>
|
|
<capability id="clfsh"/>
|
|
<capability id="ds"/>
|
|
<capability id="acpi"/>
|
|
<capability id="mmx"/>
|
|
<capability id="fxsr"/>
|
|
<capability id="sse"/>
|
|
<capability id="sse2"/>
|
|
<capability id="ss"/>
|
|
<capability id="htt"/>
|
|
<capability id="tm"/>
|
|
<capability id="pbe"/>
|
|
<capability id="digital_temperature_sensor_supported"/>
|
|
<capability id="arat_supported"/>
|
|
<capability id="pln_supported"/>
|
|
<capability id="ecmd_supported"/>
|
|
<capability id="package_thermal_management_supported"/>
|
|
<capability id="hwp_supported"/>
|
|
<capability id="hwp_notification"/>
|
|
<capability id="hwp_activity_window"/>
|
|
<capability id="hwp_energy_performance_preference"/>
|
|
<capability id="hwp_package_level_request"/>
|
|
<capability id="hwp_capabilities"/>
|
|
<capability id="hwp_peci_override"/>
|
|
<capability id="flexible_hwp"/>
|
|
<capability id="fast_hwp_request"/>
|
|
<capability id="hw_feedback"/>
|
|
<capability id="ignoring_idle_hwp"/>
|
|
<capability id="thread_director"/>
|
|
<capability id="hardware_coordination_feedback_capability"/>
|
|
<capability id="performance_energy_bias"/>
|
|
<capability id="digital_temperature_sensor_supported"/>
|
|
<capability id="arat_supported"/>
|
|
<capability id="pln_supported"/>
|
|
<capability id="ecmd_supported"/>
|
|
<capability id="package_thermal_management_supported"/>
|
|
<capability id="hwp_supported"/>
|
|
<capability id="hwp_notification"/>
|
|
<capability id="hwp_activity_window"/>
|
|
<capability id="hwp_energy_performance_preference"/>
|
|
<capability id="hwp_package_level_request"/>
|
|
<capability id="hwp_capabilities"/>
|
|
<capability id="hwp_peci_override"/>
|
|
<capability id="flexible_hwp"/>
|
|
<capability id="fast_hwp_request"/>
|
|
<capability id="hw_feedback"/>
|
|
<capability id="ignoring_idle_hwp"/>
|
|
<capability id="thread_director"/>
|
|
<capability id="hardware_coordination_feedback_capability"/>
|
|
<capability id="performance_energy_bias"/>
|
|
<capability id="fsgsbase"/>
|
|
<capability id="ia32_tsc_adjust_msr"/>
|
|
<capability id="bmi1"/>
|
|
<capability id="avx2"/>
|
|
<capability id="fdp_excptn_only"/>
|
|
<capability id="smep"/>
|
|
<capability id="bmi2"/>
|
|
<capability id="erms"/>
|
|
<capability id="invpcid"/>
|
|
<capability id="deprecate_fpu"/>
|
|
<capability id="rdt_a"/>
|
|
<capability id="rdseed"/>
|
|
<capability id="adx"/>
|
|
<capability id="smap"/>
|
|
<capability id="clflushopt"/>
|
|
<capability id="clwb"/>
|
|
<capability id="intel_pt"/>
|
|
<capability id="sha"/>
|
|
<capability id="umip"/>
|
|
<capability id="pku"/>
|
|
<capability id="waitpkg"/>
|
|
<capability id="cet_ss"/>
|
|
<capability id="gfni"/>
|
|
<capability id="vaes"/>
|
|
<capability id="vpclmulqdq"/>
|
|
<capability id="tme_en"/>
|
|
<capability id="rdpid"/>
|
|
<capability id="kl"/>
|
|
<capability id="movdiri"/>
|
|
<capability id="movdiri64b"/>
|
|
<capability id="pks"/>
|
|
<capability id="fast_short_rep_mov"/>
|
|
<capability id="md_clear"/>
|
|
<capability id="hybrid"/>
|
|
<capability id="pconfig"/>
|
|
<capability id="cet_ibt"/>
|
|
<capability id="ibrs_ibpb"/>
|
|
<capability id="stibp"/>
|
|
<capability id="l1d_flush"/>
|
|
<capability id="ia32_arch_capabilities"/>
|
|
<capability id="ia32_core_capabilities"/>
|
|
<capability id="ssbd"/>
|
|
<capability id="lahf_sahf_64"/>
|
|
<capability id="lzcnt"/>
|
|
<capability id="prefetchw"/>
|
|
<capability id="syscall_sysret_64"/>
|
|
<capability id="execute_disable"/>
|
|
<capability id="gbyte_pages"/>
|
|
<capability id="rdtscp_ia32_tsc_aux"/>
|
|
<capability id="intel_64"/>
|
|
<capability id="invariant_tsc"/>
|
|
<capability id="fast_string"/>
|
|
<capability id="vmx_pinbased_ctls_irq_exit"/>
|
|
<capability id="ept"/>
|
|
<capability id="apicv"/>
|
|
<capability id="vmx_procbased_ctls_tsc_off"/>
|
|
<capability id="vmx_procbased_ctls_tpr_shadow"/>
|
|
<capability id="vmx_procbased_ctls_io_bitmap"/>
|
|
<capability id="vmx_procbased_ctls_msr_bitmap"/>
|
|
<capability id="vmx_procbased_ctls_hlt"/>
|
|
<capability id="vmx_procbased_ctls_secondary"/>
|
|
<capability id="vmx_exit_ctls_ack_irq"/>
|
|
<capability id="vmx_exit_ctls_save_pat"/>
|
|
<capability id="vmx_exit_ctls_load_pat"/>
|
|
<capability id="vmx_exit_ctls_host_addr64"/>
|
|
<capability id="vmx_entry_ctls_load_pat"/>
|
|
<capability id="vmx_entry_ctls_ia32e_mode"/>
|
|
<capability id="stores_lma_on_exit"/>
|
|
<capability id="vmx_procbased_ctls2_vapic"/>
|
|
<capability id="vmx_procbased_ctls2_ept"/>
|
|
<capability id="vmx_procbased_ctls2_vpid"/>
|
|
<capability id="vmx_procbased_ctls2_rdtscp"/>
|
|
<capability id="vmx_procbased_ctls2_unrestrict"/>
|
|
<capability id="invept"/>
|
|
<capability id="invvpid"/>
|
|
<capability id="ept_2mb_page"/>
|
|
<capability id="vmx_ept_1gb_page"/>
|
|
<attribute id="cpuid_level">0x20</attribute>
|
|
<attribute id="physical_address_bits">46</attribute>
|
|
<attribute id="linear_address_bits">48</attribute>
|
|
<attribute id="max_ratio_1core">48</attribute>
|
|
<attribute id="max_none_turbo_ratio">0</attribute>
|
|
</model>
|
|
<model description="12th Gen Intel(R) Core(TM) i7-12700E">
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<core_type>Atom</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<capability id="sse3"/>
|
|
<capability id="pclmulqdq"/>
|
|
<capability id="dtes64"/>
|
|
<capability id="monitor"/>
|
|
<capability id="ds_cpl"/>
|
|
<capability id="vmx"/>
|
|
<capability id="smx"/>
|
|
<capability id="est"/>
|
|
<capability id="tm2"/>
|
|
<capability id="ssse3"/>
|
|
<capability id="sdbg"/>
|
|
<capability id="fma"/>
|
|
<capability id="cmpxchg16b"/>
|
|
<capability id="xtpr"/>
|
|
<capability id="pdcm"/>
|
|
<capability id="pcid"/>
|
|
<capability id="sse4_1"/>
|
|
<capability id="sse4_2"/>
|
|
<capability id="x2apic"/>
|
|
<capability id="movbe"/>
|
|
<capability id="popcnt"/>
|
|
<capability id="tsc_deadline"/>
|
|
<capability id="aes"/>
|
|
<capability id="xsave"/>
|
|
<capability id="avx"/>
|
|
<capability id="f16c"/>
|
|
<capability id="rdrand"/>
|
|
<capability id="fpu"/>
|
|
<capability id="vme"/>
|
|
<capability id="de"/>
|
|
<capability id="pse"/>
|
|
<capability id="tsc"/>
|
|
<capability id="msr"/>
|
|
<capability id="pae"/>
|
|
<capability id="mce"/>
|
|
<capability id="cx8"/>
|
|
<capability id="apic"/>
|
|
<capability id="sep"/>
|
|
<capability id="mtrr"/>
|
|
<capability id="pge"/>
|
|
<capability id="mca"/>
|
|
<capability id="cmov"/>
|
|
<capability id="pat"/>
|
|
<capability id="pse36"/>
|
|
<capability id="clfsh"/>
|
|
<capability id="ds"/>
|
|
<capability id="acpi"/>
|
|
<capability id="mmx"/>
|
|
<capability id="fxsr"/>
|
|
<capability id="sse"/>
|
|
<capability id="sse2"/>
|
|
<capability id="ss"/>
|
|
<capability id="htt"/>
|
|
<capability id="tm"/>
|
|
<capability id="pbe"/>
|
|
<capability id="digital_temperature_sensor_supported"/>
|
|
<capability id="arat_supported"/>
|
|
<capability id="pln_supported"/>
|
|
<capability id="ecmd_supported"/>
|
|
<capability id="package_thermal_management_supported"/>
|
|
<capability id="hwp_supported"/>
|
|
<capability id="hwp_notification"/>
|
|
<capability id="hwp_activity_window"/>
|
|
<capability id="hwp_energy_performance_preference"/>
|
|
<capability id="hwp_package_level_request"/>
|
|
<capability id="hwp_capabilities"/>
|
|
<capability id="hwp_peci_override"/>
|
|
<capability id="flexible_hwp"/>
|
|
<capability id="fast_hwp_request"/>
|
|
<capability id="hw_feedback"/>
|
|
<capability id="ignoring_idle_hwp"/>
|
|
<capability id="thread_director"/>
|
|
<capability id="hardware_coordination_feedback_capability"/>
|
|
<capability id="performance_energy_bias"/>
|
|
<capability id="digital_temperature_sensor_supported"/>
|
|
<capability id="arat_supported"/>
|
|
<capability id="pln_supported"/>
|
|
<capability id="ecmd_supported"/>
|
|
<capability id="package_thermal_management_supported"/>
|
|
<capability id="hwp_supported"/>
|
|
<capability id="hwp_notification"/>
|
|
<capability id="hwp_activity_window"/>
|
|
<capability id="hwp_energy_performance_preference"/>
|
|
<capability id="hwp_package_level_request"/>
|
|
<capability id="hwp_capabilities"/>
|
|
<capability id="hwp_peci_override"/>
|
|
<capability id="flexible_hwp"/>
|
|
<capability id="fast_hwp_request"/>
|
|
<capability id="hw_feedback"/>
|
|
<capability id="ignoring_idle_hwp"/>
|
|
<capability id="thread_director"/>
|
|
<capability id="hardware_coordination_feedback_capability"/>
|
|
<capability id="performance_energy_bias"/>
|
|
<capability id="fsgsbase"/>
|
|
<capability id="ia32_tsc_adjust_msr"/>
|
|
<capability id="bmi1"/>
|
|
<capability id="avx2"/>
|
|
<capability id="fdp_excptn_only"/>
|
|
<capability id="smep"/>
|
|
<capability id="bmi2"/>
|
|
<capability id="erms"/>
|
|
<capability id="invpcid"/>
|
|
<capability id="deprecate_fpu"/>
|
|
<capability id="rdt_a"/>
|
|
<capability id="rdseed"/>
|
|
<capability id="adx"/>
|
|
<capability id="smap"/>
|
|
<capability id="clflushopt"/>
|
|
<capability id="clwb"/>
|
|
<capability id="intel_pt"/>
|
|
<capability id="sha"/>
|
|
<capability id="umip"/>
|
|
<capability id="pku"/>
|
|
<capability id="waitpkg"/>
|
|
<capability id="cet_ss"/>
|
|
<capability id="gfni"/>
|
|
<capability id="vaes"/>
|
|
<capability id="vpclmulqdq"/>
|
|
<capability id="tme_en"/>
|
|
<capability id="rdpid"/>
|
|
<capability id="kl"/>
|
|
<capability id="movdiri"/>
|
|
<capability id="movdiri64b"/>
|
|
<capability id="pks"/>
|
|
<capability id="fast_short_rep_mov"/>
|
|
<capability id="md_clear"/>
|
|
<capability id="hybrid"/>
|
|
<capability id="pconfig"/>
|
|
<capability id="cet_ibt"/>
|
|
<capability id="ibrs_ibpb"/>
|
|
<capability id="stibp"/>
|
|
<capability id="l1d_flush"/>
|
|
<capability id="ia32_arch_capabilities"/>
|
|
<capability id="ia32_core_capabilities"/>
|
|
<capability id="ssbd"/>
|
|
<capability id="lahf_sahf_64"/>
|
|
<capability id="lzcnt"/>
|
|
<capability id="prefetchw"/>
|
|
<capability id="syscall_sysret_64"/>
|
|
<capability id="execute_disable"/>
|
|
<capability id="gbyte_pages"/>
|
|
<capability id="rdtscp_ia32_tsc_aux"/>
|
|
<capability id="intel_64"/>
|
|
<capability id="invariant_tsc"/>
|
|
<capability id="fast_string"/>
|
|
<capability id="vmx_pinbased_ctls_irq_exit"/>
|
|
<capability id="ept"/>
|
|
<capability id="apicv"/>
|
|
<capability id="vmx_procbased_ctls_tsc_off"/>
|
|
<capability id="vmx_procbased_ctls_tpr_shadow"/>
|
|
<capability id="vmx_procbased_ctls_io_bitmap"/>
|
|
<capability id="vmx_procbased_ctls_msr_bitmap"/>
|
|
<capability id="vmx_procbased_ctls_hlt"/>
|
|
<capability id="vmx_procbased_ctls_secondary"/>
|
|
<capability id="vmx_exit_ctls_ack_irq"/>
|
|
<capability id="vmx_exit_ctls_save_pat"/>
|
|
<capability id="vmx_exit_ctls_load_pat"/>
|
|
<capability id="vmx_exit_ctls_host_addr64"/>
|
|
<capability id="vmx_entry_ctls_load_pat"/>
|
|
<capability id="vmx_entry_ctls_ia32e_mode"/>
|
|
<capability id="stores_lma_on_exit"/>
|
|
<capability id="vmx_procbased_ctls2_vapic"/>
|
|
<capability id="vmx_procbased_ctls2_ept"/>
|
|
<capability id="vmx_procbased_ctls2_vpid"/>
|
|
<capability id="vmx_procbased_ctls2_rdtscp"/>
|
|
<capability id="vmx_procbased_ctls2_unrestrict"/>
|
|
<capability id="invept"/>
|
|
<capability id="invvpid"/>
|
|
<capability id="ept_2mb_page"/>
|
|
<capability id="vmx_ept_1gb_page"/>
|
|
<attribute id="cpuid_level">0x20</attribute>
|
|
<attribute id="physical_address_bits">46</attribute>
|
|
<attribute id="linear_address_bits">48</attribute>
|
|
<attribute id="max_ratio_1core">48</attribute>
|
|
<attribute id="max_none_turbo_ratio">0</attribute>
|
|
</model>
|
|
<die id="0x0">
|
|
<core id="0x0">
|
|
<thread id="0x0">
|
|
<cpu_id>0</cpu_id>
|
|
<apic_id>0x0</apic_id>
|
|
<x2apic_id>0x0</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
<guaranteed_performance_lvl>27</guaranteed_performance_lvl>
|
|
<lowest_performance_lvl>1</lowest_performance_lvl>
|
|
<freqdomain_cpus>0</freqdomain_cpus>
|
|
</thread>
|
|
</core>
|
|
<core id="0x4">
|
|
<thread id="0x8">
|
|
<cpu_id>1</cpu_id>
|
|
<apic_id>0x8</apic_id>
|
|
<x2apic_id>0x8</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
<guaranteed_performance_lvl>27</guaranteed_performance_lvl>
|
|
<lowest_performance_lvl>1</lowest_performance_lvl>
|
|
<freqdomain_cpus>1</freqdomain_cpus>
|
|
</thread>
|
|
</core>
|
|
<core id="0x8">
|
|
<thread id="0x10">
|
|
<cpu_id>2</cpu_id>
|
|
<apic_id>0x10</apic_id>
|
|
<x2apic_id>0x10</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
<guaranteed_performance_lvl>27</guaranteed_performance_lvl>
|
|
<lowest_performance_lvl>1</lowest_performance_lvl>
|
|
<freqdomain_cpus>2</freqdomain_cpus>
|
|
</thread>
|
|
</core>
|
|
<core id="0xc">
|
|
<thread id="0x18">
|
|
<cpu_id>3</cpu_id>
|
|
<apic_id>0x18</apic_id>
|
|
<x2apic_id>0x18</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
<guaranteed_performance_lvl>27</guaranteed_performance_lvl>
|
|
<lowest_performance_lvl>1</lowest_performance_lvl>
|
|
<freqdomain_cpus>3</freqdomain_cpus>
|
|
</thread>
|
|
</core>
|
|
<core id="0x10">
|
|
<thread id="0x20">
|
|
<cpu_id>4</cpu_id>
|
|
<apic_id>0x20</apic_id>
|
|
<x2apic_id>0x20</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
<guaranteed_performance_lvl>27</guaranteed_performance_lvl>
|
|
<lowest_performance_lvl>1</lowest_performance_lvl>
|
|
<freqdomain_cpus>4</freqdomain_cpus>
|
|
</thread>
|
|
</core>
|
|
<core id="0x14">
|
|
<thread id="0x28">
|
|
<cpu_id>5</cpu_id>
|
|
<apic_id>0x28</apic_id>
|
|
<x2apic_id>0x28</x2apic_id>
|
|
<family_id>0x6</family_id>
|
|
<model_id>0x97</model_id>
|
|
<stepping_id>0x2</stepping_id>
|
|
<core_type>Core</core_type>
|
|
<native_model_id>0x1</native_model_id>
|
|
<highest_performance_lvl>61</highest_performance_lvl>
|
|
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<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4c</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x27" type="1">
|
|
<cache_size>32768</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>64</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4e</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="1" id="0x27" type="2">
|
|
<cache_size>65536</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>8</ways>
|
|
<sets>128</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x4e</processor>
|
|
</processors>
|
|
</cache>
|
|
<cache level="2" id="0x0" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x1" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x8</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x2" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x10</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x3" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x18</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x4" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x20</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x5" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x28</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x6" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x30</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x7" type="3">
|
|
<cache_size>1310720</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x38</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>8</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="2" id="0x9" type="3">
|
|
<cache_size>2097152</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>16</ways>
|
|
<sets>2048</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>0</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x48</processor>
|
|
<processor>0x4a</processor>
|
|
<processor>0x4c</processor>
|
|
<processor>0x4e</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>16</capacity_mask_length>
|
|
<clos_number>16</clos_number>
|
|
</capability>
|
|
<capability id="CDP"/>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
<waymask>0xffff</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>17</native>
|
|
</parameter>
|
|
</cache>
|
|
<cache level="3" id="0x0" type="3">
|
|
<cache_size>26214400</cache_size>
|
|
<line_size>64</line_size>
|
|
<ways>10</ways>
|
|
<sets>40960</sets>
|
|
<partitions>1</partitions>
|
|
<self_initializing>1</self_initializing>
|
|
<fully_associative>0</fully_associative>
|
|
<write_back_invalidate>0</write_back_invalidate>
|
|
<cache_inclusiveness>0</cache_inclusiveness>
|
|
<complex_cache_indexing>1</complex_cache_indexing>
|
|
<processors>
|
|
<processor>0x0</processor>
|
|
<processor>0x8</processor>
|
|
<processor>0x10</processor>
|
|
<processor>0x18</processor>
|
|
<processor>0x20</processor>
|
|
<processor>0x28</processor>
|
|
<processor>0x30</processor>
|
|
<processor>0x38</processor>
|
|
<processor>0x48</processor>
|
|
<processor>0x4a</processor>
|
|
<processor>0x4c</processor>
|
|
<processor>0x4e</processor>
|
|
</processors>
|
|
<capability id="CAT">
|
|
<capacity_mask_length>10</capacity_mask_length>
|
|
<clos_number>16</clos_number>
|
|
</capability>
|
|
<parameter id="IA Waymask">
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
<waymask>0x3ff</waymask>
|
|
</parameter>
|
|
<parameter id="GT Waymask">
|
|
<waymask>0x1</waymask>
|
|
</parameter>
|
|
<parameter id="Worst Case Access Latency">
|
|
<native>139</native>
|
|
</parameter>
|
|
</cache>
|
|
<parameter id="RTCT Version">
|
|
<major>2</major>
|
|
<minor>0</minor>
|
|
</parameter>
|
|
<parameter id="RTCD Version">
|
|
<major>2</major>
|
|
<minor>0</minor>
|
|
</parameter>
|
|
<parameter id="Total IA L2 CLOS">8</parameter>
|
|
<parameter id="Total IA L3 CLOS">16</parameter>
|
|
<parameter id="Total IA L2 Instances">10</parameter>
|
|
<parameter id="Total IA L2 Instances">1</parameter>
|
|
<parameter id="Total GT CLOS">1</parameter>
|
|
<parameter id="Total WRC CLOS">0</parameter>
|
|
</caches>
|
|
<memory>
|
|
<range start="0x0000000000000000" end="0x000000000009dfff" size="647168"/>
|
|
<range start="0x000000000009f000" end="0x000000000009ffff" size="4096"/>
|
|
<range start="0x0000000000100000" end="0x000000002007ffff" size="536346624"/>
|
|
<range start="0x0000000020081000" end="0x00000000725bffff" size="1381232640"/>
|
|
<range start="0x0000000075fff000" end="0x0000000075ffffff" size="4096"/>
|
|
<range start="0x0000000100000000" end="0x000000087f7fffff" size="32203866112"/>
|
|
<range id="TCC Error Log" start="0x0000000020080000" end="0x00000000200801e7" size="488"/>
|
|
</memory>
|
|
<ioapics>
|
|
<ioapic id="0x2">
|
|
<address>0xfec00000</address>
|
|
<gsi_base>0x0</gsi_base>
|
|
<gsi_number>120</gsi_number>
|
|
</ioapic>
|
|
</ioapics>
|
|
<devices>
|
|
<parameter id="Maximum TCC Streams">8</parameter>
|
|
<parameter id="Maximum TCC Registers">550</parameter>
|
|
<bus type="pci" address="0x0" id="0x4668" description="Host bridge: Intel Corporation 12th Gen Core Processor Host Bridge/DRAM Registers">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x4668</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x4668</subsystem_identifier>
|
|
<class>0x060000</class>
|
|
<resource type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
|
|
<resource type="memory" min="0xe0000" max="0xe3fff" len="0x4000"/>
|
|
<resource type="memory" min="0xe4000" max="0xe7fff" len="0x4000"/>
|
|
<resource type="memory" min="0xe8000" max="0xebfff" len="0x4000"/>
|
|
<resource type="memory" min="0xec000" max="0xeffff" len="0x4000"/>
|
|
<resource type="memory" min="0x80800000" max="0xbfffffff" len="0x3f800000"/>
|
|
<resource type="memory" min="0x4000000000" max="0x7fffffffff" len="0x4000000000"/>
|
|
<device address="0x20000" id="0x4680" description="00:02.0 VGA compatible controller: Intel Corporation AlderLake-S GT1">
|
|
<vendor>0x8086</vendor>
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<identifier>0x4680</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x4680</subsystem_identifier>
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<class>0x030000</class>
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<resource type="io_port" min="0x3000" max="0x303f" len="0x40" id="bar4"/>
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<capability id="Vendor-Specific"/>
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<capability id="PCI Express"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="per-vector masking"/>
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</capability>
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<capability id="Power Management"/>
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|
<capability id="PASID"/>
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<capability id="ATS"/>
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<capability id="PRI"/>
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<capability id="SR-IOV">
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<initial_vfs>7</initial_vfs>
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<total_vfs>7</total_vfs>
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<function_dependency_link>0</function_dependency_link>
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<first_vf_bdf>
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<bus>0x0</bus>
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<device>0x2</device>
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<function>0x1</function>
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</first_vf_bdf>
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<vf_stride>1</vf_stride>
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<vf_device_id>0x4680</vf_device_id>
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<supported_page_sizes>0x553</supported_page_sizes>
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</capability>
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<display type="High Definition Multimedia Interface (HDMI)">0</display>
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</device>
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<device address="0x60000" id="0x464d" description="00:06.0 PCI bridge: Intel Corporation 12th Gen Core Processor PCI Express x4 Controller #0">
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<vendor>0x8086</vendor>
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<identifier>0x464d</identifier>
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<class>0x060400</class>
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<resource type="interrupt_pin" pin="INTD#"/>
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<resource type="memory" min="0x81200000" max="0x812fffff" len="0x100000"/>
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<capability id="PCI Express"/>
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<capability id="MSI">
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|
<count>1</count>
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</capability>
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<capability id="Subsystem ID and Subsystem Vendor ID"/>
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<capability id="Power Management"/>
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<capability id="Advanced Error Reporting"/>
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<capability id="ACS"/>
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<capability id="TPM"/>
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<capability id="Virtual Channel"/>
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<capability id="Secondary PCI Express"/>
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<capability id="Data Link Feature"/>
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<capability id="Physical Layer 16.0 GT/s"/>
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<capability id="Lane Margining at the Receiver"/>
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<bus type="pci" address="0x1">
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<device address="0x0" id="0x500d" description="01:00.0 Non-Volatile memory controller: Kingston Technology Company, Inc. OM3PDP3 NVMe SSD">
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<vendor>0x2646</vendor>
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<identifier>0x500d</identifier>
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<subsystem_vendor>0x2646</subsystem_vendor>
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<subsystem_identifier>0x500d</subsystem_identifier>
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<class>0x010802</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x81200000" max="0x81203fff" len="0x4000" id="bar0" width="64" prefetchable="0"/>
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<capability id="PCI Express"/>
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<capability id="MSI-X">
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<table_size>9</table_size>
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<table_bir>1</table_bir>
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<table_offset>0x10000000</table_offset>
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</capability>
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<capability id="MSI">
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<count>8</count>
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<capability id="multiple-message"/>
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<capability id="64-bit address"/>
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<capability id="per-vector masking"/>
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</capability>
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<capability id="Power Management"/>
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<capability id="LTR"/>
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<capability id="L1 PM Substates"/>
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<capability id="Advanced Error Reporting"/>
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<capability id="Secondary PCI Express"/>
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</device>
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</bus>
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</device>
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<device address="0x140000" id="0x7ae0" description="00:14.0 USB controller: Intel Corporation Alder Lake-S PCH USB 3.2 Gen 2x2 XHCI Controller">
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<vendor>0x8086</vendor>
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<identifier>0x7ae0</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x7ae0</subsystem_identifier>
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<class>0x0c0330</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x6001100000" max="0x600110ffff" len="0x10000" id="bar0" width="64" prefetchable="0"/>
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<capability id="Power Management"/>
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<capability id="MSI">
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<count>8</count>
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<capability id="multiple-message"/>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Vendor-Specific"/>
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<capability id="Vendor-Specific"/>
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</device>
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<device address="0x140002" id="0x7aa7" description="00:14.2 RAM memory: Intel Corporation Alder Lake-S PCH Shared SRAM">
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<vendor>0x8086</vendor>
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<identifier>0x7aa7</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x7aa7</subsystem_identifier>
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<class>0x050000</class>
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<resource type="memory" min="0x6001114000" max="0x6001117fff" len="0x4000" id="bar0" width="64" prefetchable="0"/>
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<resource type="memory" min="0x600111c000" max="0x600111cfff" len="0x1000" id="bar2" width="64" prefetchable="0"/>
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<capability id="Power Management"/>
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</device>
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<device address="0x160000" id="0x7ae8" description="00:16.0 Communication controller: Intel Corporation Alder Lake-S PCH HECI Controller #1">
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<vendor>0x8086</vendor>
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<identifier>0x7ae8</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x7ae8</subsystem_identifier>
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<class>0x078000</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x600111b000" max="0x600111bfff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
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<capability id="Power Management"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Vendor-Specific"/>
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</device>
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<device address="0x160003" id="0x7aeb" description="00:16.3 Serial controller: Intel Corporation">
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<vendor>0x8086</vendor>
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<identifier>0x7aeb</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x7aeb</subsystem_identifier>
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<class>0x070002</class>
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<resource type="interrupt_pin" pin="INTD#"/>
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<resource type="io_port" min="0x30a0" max="0x30a7" len="0x8" id="bar0"/>
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<resource type="memory" min="0x81304000" max="0x81304fff" len="0x1000" id="bar1" width="32" prefetchable="0"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Power Management"/>
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</device>
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<device address="0x170000" id="0x7ae2" description="00:17.0 SATA controller: Intel Corporation Alder Lake-S PCH SATA Controller [AHCI Mode]">
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<vendor>0x8086</vendor>
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<identifier>0x7ae2</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x7ae2</subsystem_identifier>
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<class>0x010601</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="io_port" min="0x3060" max="0x307f" len="0x20" id="bar4"/>
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<resource type="io_port" min="0x3080" max="0x3083" len="0x4" id="bar3"/>
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<resource type="io_port" min="0x3090" max="0x3097" len="0x8" id="bar2"/>
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<resource type="memory" min="0x81300000" max="0x81301fff" len="0x2000" id="bar0" width="32" prefetchable="0"/>
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<resource type="memory" min="0x81302000" max="0x813027ff" len="0x800" id="bar5" width="32" prefetchable="0"/>
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<resource type="memory" min="0x81303000" max="0x813030ff" len="0x100" id="bar1" width="32" prefetchable="0"/>
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<capability id="MSI">
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<count>1</count>
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</capability>
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<capability id="Power Management"/>
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<capability id="Reserved (0x12)"/>
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</device>
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<device address="0x1c0000" id="0x7ab8" description="00:1c.0 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #1">
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<vendor>0x8086</vendor>
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<identifier>0x7ab8</identifier>
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<class>0x060400</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<capability id="PCI Express"/>
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<capability id="MSI">
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|
<count>1</count>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Subsystem ID and Subsystem Vendor ID"/>
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|
<capability id="Power Management"/>
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|
<capability id="Advanced Error Reporting"/>
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<capability id="ACS"/>
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<capability id="TPM"/>
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<capability id="Secondary PCI Express"/>
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<capability id="Data Link Feature"/>
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|
<bus type="pci" address="0x2"/>
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</device>
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<device address="0x1c0002" id="0x7aba" description="00:1c.2 PCI bridge: Intel Corporation">
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<vendor>0x8086</vendor>
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<identifier>0x7aba</identifier>
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<class>0x060400</class>
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<resource type="interrupt_pin" pin="INTC#"/>
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<resource type="memory" min="0x81000000" max="0x811fffff" len="0x200000"/>
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<capability id="PCI Express"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Subsystem ID and Subsystem Vendor ID"/>
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|
<capability id="Power Management"/>
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<capability id="Advanced Error Reporting"/>
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<capability id="ACS"/>
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<capability id="TPM"/>
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<capability id="Secondary PCI Express"/>
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<capability id="Data Link Feature"/>
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<bus type="pci" address="0x3">
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<device address="0x0" id="0x15f2" description="03:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM">
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<vendor>0x8086</vendor>
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<identifier>0x15f2</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x15f2</subsystem_identifier>
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<class>0x020000</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x81000000" max="0x810fffff" len="0x100000" id="bar0" width="32" prefetchable="0"/>
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<resource type="memory" min="0x81100000" max="0x81103fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
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<capability id="Power Management"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="64-bit address"/>
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<capability id="per-vector masking"/>
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</capability>
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<capability id="MSI-X">
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<table_size>5</table_size>
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<table_bir>7</table_bir>
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<table_offset>0x30000</table_offset>
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<pba_bir>1</pba_bir>
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<pba_offset>0x0</pba_offset>
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</capability>
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<capability id="PCI Express"/>
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<capability id="Advanced Error Reporting"/>
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<capability id="Device Serial Number"/>
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<capability id="LTR"/>
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<capability id="TPM"/>
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<capability id="L1 PM Substates"/>
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</device>
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</bus>
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</device>
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<device address="0x1c0003" id="0x7abb" description="00:1c.3 PCI bridge: Intel Corporation">
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|
<vendor>0x8086</vendor>
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<identifier>0x7abb</identifier>
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<class>0x060400</class>
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<resource type="interrupt_pin" pin="INTD#"/>
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<resource type="memory" min="0x80e00000" max="0x80ffffff" len="0x200000"/>
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<capability id="PCI Express"/>
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<capability id="MSI">
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<count>1</count>
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<capability id="64-bit address"/>
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</capability>
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<capability id="Subsystem ID and Subsystem Vendor ID"/>
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|
<capability id="Power Management"/>
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<capability id="Advanced Error Reporting"/>
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<capability id="ACS"/>
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<capability id="TPM"/>
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<capability id="Secondary PCI Express"/>
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<capability id="Data Link Feature"/>
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<bus type="pci" address="0x4">
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|
<device address="0x0" id="0x15f2" description="04:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM">
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|
<vendor>0x8086</vendor>
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<identifier>0x15f2</identifier>
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<subsystem_vendor>0x1849</subsystem_vendor>
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<subsystem_identifier>0x15f2</subsystem_identifier>
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<class>0x020000</class>
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<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x80e00000" max="0x80efffff" len="0x100000" id="bar0" width="32" prefetchable="0"/>
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<resource type="memory" min="0x80f00000" max="0x80f03fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
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<capability id="Power Management"/>
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<capability id="MSI">
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|
<count>1</count>
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|
<capability id="64-bit address"/>
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|
<capability id="per-vector masking"/>
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|
</capability>
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|
<capability id="MSI-X">
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|
<table_size>5</table_size>
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|
<table_bir>7</table_bir>
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<table_offset>0x30000</table_offset>
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|
<pba_bir>1</pba_bir>
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|
<pba_offset>0x0</pba_offset>
|
|
</capability>
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<capability id="PCI Express"/>
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|
<capability id="Advanced Error Reporting"/>
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|
<capability id="Device Serial Number"/>
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|
<capability id="LTR"/>
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|
<capability id="TPM"/>
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|
<capability id="L1 PM Substates"/>
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|
</device>
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</bus>
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|
</device>
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<device address="0x1c0004" id="0x7abc" description="00:1c.4 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #5">
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|
<vendor>0x8086</vendor>
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|
<identifier>0x7abc</identifier>
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|
<class>0x060400</class>
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|
<resource type="interrupt_pin" pin="INTA#"/>
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|
<resource type="memory" min="0x80c00000" max="0x80dfffff" len="0x200000"/>
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|
<capability id="PCI Express"/>
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|
<capability id="MSI">
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|
<count>1</count>
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|
<capability id="64-bit address"/>
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|
</capability>
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|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
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|
<capability id="Power Management"/>
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|
<capability id="Advanced Error Reporting"/>
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|
<capability id="ACS"/>
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|
<capability id="TPM"/>
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|
<capability id="Secondary PCI Express"/>
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|
<capability id="Data Link Feature"/>
|
|
<bus type="pci" address="0x5">
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|
<device address="0x0" id="0x15f2" description="05:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM">
|
|
<vendor>0x8086</vendor>
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|
<identifier>0x15f2</identifier>
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|
<subsystem_vendor>0x1849</subsystem_vendor>
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|
<subsystem_identifier>0x15f2</subsystem_identifier>
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|
<class>0x020000</class>
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|
<resource type="interrupt_pin" pin="INTA#"/>
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<resource type="memory" min="0x80c00000" max="0x80cfffff" len="0x100000" id="bar0" width="32" prefetchable="0"/>
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|
<resource type="memory" min="0x80d00000" max="0x80d03fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
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|
<capability id="Power Management"/>
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|
<capability id="MSI">
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|
<count>1</count>
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|
<capability id="64-bit address"/>
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|
<capability id="per-vector masking"/>
|
|
</capability>
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|
<capability id="MSI-X">
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|
<table_size>5</table_size>
|
|
<table_bir>7</table_bir>
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|
<table_offset>0x30000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
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|
<capability id="PCI Express"/>
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|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Device Serial Number"/>
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|
<capability id="LTR"/>
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|
<capability id="TPM"/>
|
|
<capability id="L1 PM Substates"/>
|
|
</device>
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|
</bus>
|
|
</device>
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<device address="0x1c0007" id="0x7abf" description="00:1c.7 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #8">
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|
<vendor>0x8086</vendor>
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|
<identifier>0x7abf</identifier>
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|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTD#"/>
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|
<resource type="memory" min="0x80a00000" max="0x80bfffff" len="0x200000"/>
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|
<capability id="PCI Express"/>
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|
<capability id="MSI">
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|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
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|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="Data Link Feature"/>
|
|
<bus type="pci" address="0x6">
|
|
<device address="0x0" id="0x15f2" description="06:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x15f2</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x15f2</subsystem_identifier>
|
|
<class>0x020000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
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|
<resource type="memory" min="0x80a00000" max="0x80afffff" len="0x100000" id="bar0" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0x80b00000" max="0x80b03fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
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|
<capability id="Power Management"/>
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|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
<capability id="per-vector masking"/>
|
|
</capability>
|
|
<capability id="MSI-X">
|
|
<table_size>5</table_size>
|
|
<table_bir>7</table_bir>
|
|
<table_offset>0x30000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="PCI Express"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Device Serial Number"/>
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|
<capability id="LTR"/>
|
|
<capability id="TPM"/>
|
|
<capability id="L1 PM Substates"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x1d0000" id="0x7ab0" description="00:1d.0 PCI bridge: Intel Corporation Alder Lake-S PCH PCI Express Root Port #9">
|
|
<vendor>0x8086</vendor>
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|
<identifier>0x7ab0</identifier>
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|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
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|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="Data Link Feature"/>
|
|
<bus type="pci" address="0x7"/>
|
|
</device>
|
|
<device address="0x1d0006" id="0x7ab6" description="00:1d.6 PCI bridge: Intel Corporation">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7ab6</identifier>
|
|
<class>0x060400</class>
|
|
<resource type="interrupt_pin" pin="INTC#"/>
|
|
<resource type="memory" min="0x80800000" max="0x809fffff" len="0x200000"/>
|
|
<capability id="PCI Express"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
<capability id="Subsystem ID and Subsystem Vendor ID"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="ACS"/>
|
|
<capability id="TPM"/>
|
|
<capability id="Secondary PCI Express"/>
|
|
<capability id="Data Link Feature"/>
|
|
<capability id="Physical Layer 16.0 GT/s"/>
|
|
<capability id="Lane Margining at the Receiver"/>
|
|
<bus type="pci" address="0x8">
|
|
<device address="0x0" id="0x15f2" description="08:00.0 Ethernet controller: Intel Corporation Ethernet Controller I225-LM">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x15f2</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x15f2</subsystem_identifier>
|
|
<class>0x020000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0x80800000" max="0x808fffff" len="0x100000" id="bar0" width="32" prefetchable="0"/>
|
|
<resource type="memory" min="0x80900000" max="0x80903fff" len="0x4000" id="bar3" width="32" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
<capability id="per-vector masking"/>
|
|
</capability>
|
|
<capability id="MSI-X">
|
|
<table_size>5</table_size>
|
|
<table_bir>7</table_bir>
|
|
<table_offset>0x30000</table_offset>
|
|
<pba_bir>1</pba_bir>
|
|
<pba_offset>0x0</pba_offset>
|
|
</capability>
|
|
<capability id="PCI Express"/>
|
|
<capability id="Advanced Error Reporting"/>
|
|
<capability id="Device Serial Number"/>
|
|
<capability id="LTR"/>
|
|
<capability id="TPM"/>
|
|
<capability id="L1 PM Substates"/>
|
|
</device>
|
|
</bus>
|
|
</device>
|
|
<device address="0x1e0000" id="0x7aa8" description="00:1e.0 Communication controller: Intel Corporation Alder Lake-S PCH Serial IO UART #0">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7aa8</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x7aa8</subsystem_identifier>
|
|
<class>0x078000</class>
|
|
<resource type="interrupt_pin" pin="INTA#"/>
|
|
<resource type="memory" min="0x4017000000" max="0x4017000fff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Vendor-Specific"/>
|
|
</device>
|
|
<device address="0x1e0003" id="0x7aab" description="00:1e.3 Serial bus controller: Intel Corporation Alder Lake-S PCH Serial IO SPI Controller #1">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7aab</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x7aab</subsystem_identifier>
|
|
<class>0x0c8000</class>
|
|
<resource type="interrupt_pin" pin="INTD#"/>
|
|
<resource type="memory" min="0x4017001000" max="0x4017001fff" len="0x1000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Vendor-Specific"/>
|
|
</device>
|
|
<device address="0x1f0000" id="0x7a90" description="00:1f.0 ISA bridge: Intel Corporation">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7a90</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x7a90</subsystem_identifier>
|
|
<class>0x060100</class>
|
|
</device>
|
|
<device address="0x1f0003" id="0x7ad0" description="00:1f.3 Audio device: Intel Corporation Alder Lake-S HD Audio Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7ad0</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0xf897</subsystem_identifier>
|
|
<class>0x040300</class>
|
|
<resource type="interrupt_pin" pin="INTB#"/>
|
|
<resource type="memory" min="0x6001000000" max="0x60010fffff" len="0x100000" id="bar4" width="64" prefetchable="0"/>
|
|
<resource type="memory" min="0x6001110000" max="0x6001113fff" len="0x4000" id="bar0" width="64" prefetchable="0"/>
|
|
<capability id="Power Management"/>
|
|
<capability id="Vendor-Specific"/>
|
|
<capability id="MSI">
|
|
<count>1</count>
|
|
<capability id="64-bit address"/>
|
|
</capability>
|
|
</device>
|
|
<device address="0x1f0004" id="0x7aa3" description="00:1f.4 SMBus: Intel Corporation Alder Lake-S PCH SMBus Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7aa3</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x7aa3</subsystem_identifier>
|
|
<class>0x0c0500</class>
|
|
<resource type="interrupt_pin" pin="INTC#"/>
|
|
<resource type="io_port" min="0xefa0" max="0xefbf" len="0x20" id="bar4"/>
|
|
<resource type="memory" min="0x6001118000" max="0x60011180ff" len="0x100" id="bar0" width="64" prefetchable="0"/>
|
|
</device>
|
|
<device address="0x1f0005" id="0x7aa4" description="00:1f.5 Serial bus controller: Intel Corporation Alder Lake-S PCH SPI Controller">
|
|
<vendor>0x8086</vendor>
|
|
<identifier>0x7aa4</identifier>
|
|
<subsystem_vendor>0x1849</subsystem_vendor>
|
|
<subsystem_identifier>0x7aa4</subsystem_identifier>
|
|
<class>0x0c8000</class>
|
|
<resource type="memory" min="0x81305000" max="0x81305fff" len="0x1000" id="bar0" width="32" prefetchable="0"/>
|
|
</device>
|
|
</bus>
|
|
</devices>
|
|
<device-classes>
|
|
<inputs>
|
|
<input>
|
|
<name>Sleep Button</name>
|
|
<phys>PNP0C0E/button/input0</phys>
|
|
</input>
|
|
<input>
|
|
<name>Power Button</name>
|
|
<phys>PNP0C0C/button/input0</phys>
|
|
</input>
|
|
<input>
|
|
<name>Power Button</name>
|
|
<phys>LNXPWRBN/button/input0</phys>
|
|
</input>
|
|
<input>
|
|
<name>Video Bus</name>
|
|
<phys>LNXVIDEO/video/input0</phys>
|
|
</input>
|
|
<input>
|
|
<name>USB usb keyboard</name>
|
|
<phys>usb-0000:00:14.0-8/input0</phys>
|
|
</input>
|
|
<input>
|
|
<name>USB usb keyboard Consumer Control</name>
|
|
<phys>usb-0000:00:14.0-8/input1</phys>
|
|
</input>
|
|
<input>
|
|
<name>USB usb keyboard System Control</name>
|
|
<phys>usb-0000:00:14.0-8/input1</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH Front Mic</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH Rear Mic</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH Line Out</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH Front Headphone</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=3</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=7</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=8</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=9</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=10</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=11</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=12</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=13</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=14</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=15</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=16</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
<input>
|
|
<name>HDA Intel PCH HDMI/DP,pcm=17</name>
|
|
<phys>ALSA</phys>
|
|
</input>
|
|
</inputs>
|
|
<ttys>
|
|
<serial>
|
|
<dev_path>/dev/ttyS0</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS1</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS2</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS3</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS4</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS5</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS6</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS7</dev_path>
|
|
<type>4</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS8</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS9</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS10</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS11</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS12</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS13</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS14</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS15</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS16</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS17</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS18</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS19</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS20</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS21</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS22</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS23</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS24</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS25</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS26</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS27</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS28</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS29</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS30</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
<serial>
|
|
<dev_path>/dev/ttyS31</dev_path>
|
|
<type>0</type>
|
|
</serial>
|
|
</ttys>
|
|
</device-classes>
|
|
</acrn-config>
|