/* * Copyright (C) 2018 Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include #include #include #include #include #include #include #include #include #include #include /* Push sp magic to top of stack for call trace */ #define SWITCH_TO(rsp, to) \ { \ asm volatile ("movq %0, %%rsp\n" \ "pushq %1\n" \ "jmpq *%2\n" \ : \ : "r"(rsp), "rm"(SP_BOTTOM_MAGIC), "a"(to)); \ } /*TODO: move into debug module */ static void init_debug_pre(void) { /* Initialize console */ console_init(); /* Enable logging */ init_logmsg(CONFIG_LOG_DESTINATION); } /*TODO: move into debug module */ static void init_debug_post(uint16_t pcpu_id) { if (pcpu_id == BSP_CPU_ID) { /* Initialize the shell */ shell_init(); console_setup_timer(); } profiling_setup(); } /*TODO: move into guest-vcpu module */ static void init_guest_mode(uint16_t pcpu_id) { vmx_on(); launch_vms(pcpu_id); } static void init_pcpu_comm_post(void) { uint16_t pcpu_id; pcpu_id = get_pcpu_id(); init_pcpu_post(pcpu_id); init_debug_post(pcpu_id); init_guest_mode(pcpu_id); run_idle_thread(); } /* NOTE: this function is using temp stack, and after SWITCH_TO(runtime_sp, to) * it will switch to runtime stack. */ void init_primary_pcpu(void) { uint64_t rsp; /* Clear BSS */ (void)memset(&ld_bss_start, 0U, (size_t)(&ld_bss_end - &ld_bss_start)); parse_hv_cmdline(); init_debug_pre(); init_pcpu_pre(true); init_seed(); /* Switch to run-time stack */ rsp = (uint64_t)(&get_cpu_var(stack)[CONFIG_STACK_SIZE - 1]); rsp &= ~(CPU_STACK_ALIGN - 1UL); SWITCH_TO(rsp, init_pcpu_comm_post); } void init_secondary_pcpu(void) { init_pcpu_pre(false); init_pcpu_comm_post(); }