Commit Graph

53 Commits

Author SHA1 Message Date
Shiqing Gao 9c025190a9 hv: hv_main: clean up HV_DEBUG usage
- Remove the usage of HV_DEBUG in hv_main.c
The usage of HV_DEBUG in hv_main.c is for the shell command 'vmexit'.
Since vmexit info has been captured by acrntrace, there is no need to
keep this duplicated feature in shell command.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-16 14:47:24 +08:00
Xiangyang Wu ace4f48c9a HV:treewide:rename vcpu_arch data structure
For data structure types "struct vcpu_arch", its name
shall follow Naming convention.

Naming convention rule:If the data structure type is
used by multi modules, its corresponding logic resource
is exposed to external components (such as SOS, UOS),
and its name meaning is simplistic (such as vcpu, vm),
its name needs prefix "acrn_". Variable name can be
shortened from its data structure type name.

The following udpates are made:
struct vcpu_arch arch_vcpu-->struct acrn_vcpu_arch arch

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Minggui Cao b048835c45 HV: fix bug "vmexit" cmd cause HV console hung
on KBL-NUC when input "vmexit" in hypervisor console,
the console or HV/SOS could be hung, the root cause is:
the log buffer is overflow for 8 CPU cores info.

to resolve the issue:
1. increase the shell log buffer size according to the
physical CPU max number
2. check the snprintf return value, if no buffer left,
just return.

Tracked-On: #1587
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-02 09:13:57 +08:00
Chinthapally, Manisha 8ba333d275 HV: Added Initial support for SEP/SOCWATCH profiling
This patch adds support to sep/socwatch profiling
     Adds 2 new files include/arch/x86/profiling.h and arch/x86/profiling.c
     which contains most of the implementation for profiling,most of the functions
     in profiling.c have dummy implementation and will be implemented in next patches

     a. cpu.c, Initial profiling setup is done as part of bsp_boot_post
  and cpu_secondary_post flow
     b. vmcall.c, New ioctl is added for performing profiling related
  operations in vmcall_vmexit_handler
	ioctl - HC_PROFILING_OPS
        function - hcall_profiling_ops()
     c. common/hypercall.c, hcall_profiling_ops() implementation.
     d. hv_main.c, In vcpu_thread calling profiling related functions
  to save vm context
     e. acrn_hv_defs.h, list all the profiling command types

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Junjun Shan 5c92329606 hv:clear up the usage of printf data struct
The printf related functions have been called by other various
functions, e.g. get_ptdev_info(), get_ioapic_info, etc. The patch
is used to clear up the usage.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:40:07 +08:00
Yin Fengwei 3178ecea72 hv: Fix the warning for ACRN release build
Now, the warning is promoted to error. The warning break ACRN
release build.

Tracked-On: #1343
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 15:46:47 +08:00
Jason Chen CJ 457ac7408d vcpu: replace start_vcpu with run_vcpu
run_vcpu should be a more suitable name

Tracked-On: #1199
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-11 10:47:34 +08:00
Shiqing Gao 67038794af hv: treewide: convert some MACROs to inline functions
MISRA-C requires that each parameter in the MACRO shall be in brackets.

In some cases, adding brackets for all of the parameters may not be a
perfect solution.
For example, it may affect the code readability when there are many
parameters used in the MACRO.
And duplicated brackets will appear when one MACRO called another MACRO
which is using same parameters.

This patch convert some MACROs to inline functions to avoid such cases.

v1 -> v2:
 * Remove the unnecessary changes in hypervisor/bsp/uefi/efi/boot.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-04 12:27:18 +08:00
Kaige Fu b5a233da9f HV: Enclose debug specific code with #ifdef HV_DEBUG
Thare some debug specific code which don't run on release version, such as vmexit_time,
vmexit_cnt, sbuf related codes, etc...

This patch encloses the codes with #ifdef HV_DEBUG.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 11:17:29 +08:00
Jason Chen CJ 63ef1236de move global x2apic_enabled into arch dir
the x2apic_enabled should be x86 specific field.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ 3d5d6c96ec vcpu: add get/set register APIs
there will be 3 types of vcpu runtime contexts:
- runtime contexts always saved/restored during VM exit/entry, which
  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and
  msr for spectre control (ia32_spec_ctrl)
- runtime contexts on-demand cached/updated during VM exit/entry, which
  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4
- runtime contexts always read/write from/to VMCS, which include left
  registers not in above

this patch add get/set register APIs for vcpu runtime contexts, and unified
the save/restore method for them according to above description.

v3:
- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,
  use on-demand cache for reading, but always write to VMCS for writing.

v2:
- use reg_cached/reg_updated for on-demand runtime contexts
- always read/write cr3 from/to VMCS

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Yonghua Huang 2299926a88 HV: Refine 'hv_main()' function usage
'hv_main()' wraps several logic which has no dependencies
   each other(enable VMX, prepare to create service os VM..),
   in this case, split this function to make code logic clear.

   remove 'is_vm0_bsp()' & 'hv_main()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 10:34:43 +08:00
Li, Fei1 8f39a22961 hv: cpu: remove unnecessary cpu_id valid check
Remove unnecessary cpu_id valid check if the cpu_id comes from
get_cpu_id().

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-02 15:21:34 +08:00
Li, Fei1 457ecd6ef7 hv: softirq: refine softirq
1. add register_softirq to register a softirq handler
2. rename exec_softirq to do_softirq; raise_softirq to fire_softirq.
3. in do_softirq call registered softirq handler not call
the device softirq handle function directly
4. enable irq after vm exit and disable irq after the first
call do_softirq before vm enter.
5. call do_softirq again when irq disabled to handle the risk
unhandled softirq.
6. rename SOFTIRQ_DEV_ASSIGN to SOFTIRQ_PTDEV
7. remove SOFTIRQ_ATOMIC

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 11:36:27 +08:00
Arindam Roy a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Huihuang Shi 59771ff461 HV:treewide:fix "Reference parameter to procedure is reassigned"
Parameter's type which is pointer should not be changed in the
scope of function,assign it's value to local variable to fixed
it out.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 12:17:12 +08:00
Jason Chen CJ 589c72382a add CONFIG_VM0_DESC support
if defined CONFIG_VM0_DESC, HV will use predefined vm0_desc to config
VM0, otherwise, HV will run VM0 with all physical cpus.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Huihuang Shi f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00
Huihuang Shi aa5027a30c HV:misc:fix "signed/unsigned conversion with cast"
Signed/unsigned conversion should add cast explicitily
or change the type of them to the same.

V1->V2:Fixed the 0U to 0UL because of the mistakes.
V2->V3:remove unsed macro

Signed-off-by: HuiHuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-16 15:45:40 +08:00
Yonghua Huang b831120165 HV: coding style cleanup for TRACE_2L & TRACE_4I usage
to align the data type of parameters

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-16 10:32:14 +08:00
Huihuang Shi e3302e87e8 HV:transfer vm_hw_logical_core_ids's type and rename it
rename vm_hw_logical_core_ids to vm_pcpu_ids
and changed the type to uint16_t.

V1->V2:rename the vm_hw_logical_core_ids

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 13:05:29 +08:00
Arindam Roy 4aa6cdacf7 HV: Fix missing brackets for MISRA C Violations
Patch 5 of 7
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Huihuang Shi d3bd514e58 HV:common:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Xiangyang Wu b76c92bf3e HV:treewide:Update cpu_id type as uint_16
There are extra type conversion in the HV since cpu_id
type is uint32_t and the return value type of get_cpu_id
is uint16_t. BTW, the name of cpu_id is not clear enough
to express its usage.

So the following updates are made in this patch:
Update cpu_id type as unit_16 to reduce type casting;
Update related temporary variables type;
Update related print argument;
Change the input parameter name of interrupt_init as
cpu_id to keep align with function implement;
Rename cpu_id as pcpu_id as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 16:39:26 +08:00
Huihuang Shi 102d2f1a68 HV:common:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Junjie Mao e75cca64c8 HV: timer: keep TSC frequency in KHz
This patch represents TSC freqeuency in KHz using a 32-bit unsigned integer.

The conversion macros between ticks and us/ms are changed to inline functions to
enforce the types of the input parameters. Note that us_to_ticks accepts only
uint32_t (~4K us at most) and never overflows.

Results of some unit tests on the conversion functions:

    calibrate_tsc, tsc_khz=1881600
    64us -> ticks: 120422
    64us -> ticks -> us: 63
    511us -> ticks: 961497
    511us -> ticks -> us: 510
    1280000 ticks -> us: 680
    1280000 ticks -> us -> ticks: 1279488

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-03 10:18:06 +08:00
Junjie Mao cfc3811a0a HV: treewide: drop debug-only helpers in release build
There are multiple helpers for collecting info to be printed on the ACRN uart
console. They are unreachable code in release builds in which the uart console
is removed.

To define a precise boundary for safety-related activities, this patch wraps the
declarations and definitions to these helpers with "#ifdef HV_DEBUG" so that
these unreachable APIs will be dropped in release builds.

v1 -> v2:

    * Fix coding style: no empty lines between #ifdef and the wrapped code.
    * Also drop get_rte_info() in ioapic.c, which is solely used by
      get_ioapic_info().

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 14:35:39 +08:00
Huihuang Shi b8384ea0dd HV:common:transfer local variable type
The local variable type should be transfer to non-basic type,
chaned it to length-prefix(uint32_t,int32_t ...) type.

Char *type or char array type which used to pointer a string
will be keeped.

V1->V2 add extra comments.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 09:49:29 +08:00
Xiangyang Wu c585172492 Rename phy_cpu_num as phys_cpu_num
phys_cpu_num is more popular than phy_cpu_num, update them
through command.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:52 +08:00
Xiangyang Wu 3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Junjie Mao aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi f92931c879 HV:common:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Huihuang Shi 977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Zheng, Gen a06f2d68dc HV: bug fix in operating softirq
Current code is missing to handle the following race condition:

   Before:

     sti
      |
      V
handle softirq with
a while loop
      |          <----- if a new softirq generated at this point,
      V                 it will be missed to be handled.
     cli
      |
      V
return with unclear softirq bitmap

    After:

again:
     sti
      |
      V
handle softirq with
a while loop
      |
      V
     cli
      |
      V
check if a new softirq generated, if yes,
jump back to above again lable point,
and do a while loop again.
      |
      V
return with clear softirq bitmap

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:12 +08:00
Yin Fegnwei 7a71422a6d hv: handle cpu offline request in idle thread
Change need_scheduled fileds of schedule context to flags because
it's not only used for need_schedule check.

Add two functions to request/handle cpu offline.

The reason we only handle cpu offline request in idle thread is
that we should pause the vcpu running on target pcpu. Then it's
only possible that target pcpu get cpu offline request in idle
thread.

Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Yin Fegnwei 08139c34f7 hv: add vmx_off and update exec_vmxon_instr
To handle cpu down/up dynamically, arcn needs to support vmx off/on
dynamically. Following changes is introduced:
  vmx_off will be used when down AP. It does:
    - vmclear the mapped vcpu
    - off vmx.

  exec_vmxon_instr is updated to handle start and up AP both. It does
    - if vmx was on on AP, load the vmxon_region saved. Otherwise,
      allocate vmxon_region.
    - if there is mapped vcpu, vmptrld mapped vcpu.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Huihuang Shi e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
David B. Kinder f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Li, Fei1 e0c329e4e9 hv: create vm failed don't panic system
Just return error number to the caller.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1 6c8fc0a4df hv: remove vm_description_array
When we create an UOS, we didn't indicate the vmid.
Thus we can't get the vm description for the vm
description array.

Instead we use a temporary vm description to save data to
fill the vm structure when crate an UOS. It's uselesss once
UOS has created. So we don't need to maintain vm description
array here for UOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1 3fb7b75eda hv: execute vmxon instruction fail don't panic system
Don't panic system when execute vmxon instruction failed.
And let's follow that only print error info when error return
from library function.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1 fe4484f5a9 hv: move panic out of hv_main
We cleanup ASSERT. This serial try to only panic when create
SOS failed.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Jason Chen CJ 75a03bf0f7 exception: use func vcpu_queue_exception to inject exception
use func vcpu_queue_exception for vcpu_inject_gp and exception_vmexit_handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ 44af2690f6 add triple fault request support
if vcpu meet triple fault, the vcpu should exit.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ 4607177383 replace pending_intr with pending_req
the pending_intr is not only serving for interrupt but also for different
request including TLB & TMR updating, so change the function & variants
name accordingly.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-30 13:51:49 +08:00
Zide Chen 8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Jason Chen CJ 67dfec8799 vmexit: refine vmexit loop
- move vmexit handling into vmexit_handler
- add error handling, failure will inject #GP

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Li, Fei1 1b1f723c7b hv: add hardware_detect_support to detect which hardware we support
Now just add some basic feature/capability detect (not all). Vapic
didn't add here for if we must support vapic then the code which
for vapic not supported must remove, like mmio apic r/w.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:56 +08:00
Yonghua Huang 11d0e59b3e revise type of 'exit_reason' and 'inst_len' in vcpu_arch
SDM 24.9.1 Volume3:
 - 'Exit reason' field in VMCS is 32 bits.

 SDM 24.9.4 in Volume3
 - 'VM-exit instruction length' field
   in VMCS is 32 bits.

 This patch is to redefine the data types of above fields
 in 'struct vcpu_arch' and udpate the code using these
 two fields.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00