Commit Graph

2118 Commits

Author SHA1 Message Date
Zheng, Gen 124910ba14 vm load: fix bug in loading kernel
According to the explaination for pref_address
in Documentation/x86/boot.txt, a relocating bootloader
should attempt to load kernel at pref_address if possible.
But due to a non-relocatable kernel will unconditionally
move itself and to run at perf address, no need to copy
kernel to perf_address by bootloader.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:19:37 +08:00
Jason Chen CJ 155be81dbf ptdev: fix bug when update ptdev entry
info->phys_pin need be used by ptdev_build_native_rte when updating entry

TODO: currently ptdev entry is virtual based, the better solution should
be physical based.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:37 +08:00
Zhao Yakui fe9dfc7842 Jmp to vm_exit directly to avoid calling vmlaunch again if vm-entry fails in vmresume
It is possible that the vm-entry fails in vmresume instr under some scenarios.
It will pass to next instruction following vmresume. In such case it will call
the vmlaunch again.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2018-05-15 17:19:37 +08:00
Mingqiang Chi f4780c0cd4 Remove unnecessary variable in map_mem
the variable 'table_present' is redundant
in function(map_mem_region)

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:37 +08:00
Minggui Cao 119b038551 to support firmware & ramdisk as multiboot mods
1. refine multiboot related code, move to /boot.
2. firmware files and ramdisk can be stitched in iasImage;
and they will be loaded as multiboot modules.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-05-15 17:19:37 +08:00
Mingqiang Chi 35f5eef658 Add page mask MACRO
Add 'CPU_PAGE_MASK' used for calculate address,
Change IA32E_REF_MASK from 0x7ffffffffffff000 to 0x000ffffffffff000
for MMU/EPT entry, bit62:52(ignore) bit63(VE/XD)
if we want to obtain the address from the MMU/EPT entry,need to clear
bit63:52 by IA32E_REF_MASK

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang 83e78e16c7 align the coding style when access VMEXIT_QUAL
- align coding style to avoid redundant operations
   when operating on reading  VMX_EXIT_QUALIFICATION

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:36 +08:00
Li, Fei1 429302c72a minor fix on get_ptdev_info
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:36 +08:00
Mingqiang Chi c451f2e4fa add create secure world ept API
This patch is prepared for enabling secure world feature.
this api will create new eptp for secure world, whose PDPT
entries are copied form normal world,the PML4/PDPT for secure
world are separated from Normal World, PD/PT are shared in the
Secure World's EPT and Normal World's EPT.Secure world can
access Normal World's memory, but Normal World can not access
Secure World's memory
This function implemented:
-- Unmap specific memory from guest ept mapping
-- Copy PDPT from Normal world to Secure world
-- Map specific memory for Secure world
-- Unmap specific memory from SOS ept mapping

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:36 +08:00
Li, Fei1 74e2bfc15f Simple get_vmx_cap()
Don't check MSR Control Features in get_vmx_cap

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:36 +08:00
Li, Fei1 cc2256d3f6 Call monitor_cap_detect in bsp_boot_init
On the APL NUC board (CPU family: 0x6 model: 92), the monitor is buggy.
We can't use it to wake up CPU core from mwait by memory monitor.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:36 +08:00
Mingqiang Chi cc1d532131 add data structure in vm for enable trusty feature
add key info structure
add sworld_eptp in vm structure, and rename ept->nworld_eptp
add secure world control structure

Change-Id:
Tracked-On:220921
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:36 +08:00
Jason Chen CJ d14a7dbdd2 retpoline: add indirect thunk support
for gcc version > 7.3, enable CONFIG_RETPOLINE

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:36 +08:00
Jason Chen CJ c244e8b5a3 vpic: use calloc to init vpic instead of malloc
vpic struct should be init as 0

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:36 +08:00
Jason Chen CJ eed8104f69 uefi: restore cr registers according to efi context
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:36 +08:00
Yin Fengwei 189329e0de apicv: cancel event injection if vcpu is scheduled out
And re-inject the event after vcpu is scheduled in.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-05-15 17:19:36 +08:00
Jason Chen CJ 2cb8ce50c1 decouple hv sw version and api version
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-11 14:44:29 +08:00
Eddie Dong 7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00