uos IGD driver need opregion when enable GVT-d.
This patch pass-thru opregion to uos gpu.
Here is the steps:
(1) set opregion gpa(guest physical addrress) 0xDFFFD000;
(2) get opregion hpa(host physical addrress);
(3) build EPT mapping for opregion.
v1 -> v2:
* initialize the EPT mapping for passthrough GPU opregion region
in passthru_init instead of reading the ASLS config space
v2 -> v3:
* add EPT unmap when deinit
* change some micro name
Tracked-On: #4360
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
gop driver and uos IGD driver will use
graphics stolen memory(gsm) when enable GVT-d.
This patch pass-thru gsm to uos gpu.
After set physical GPU gsm size 64MB in host BIOS:
Here is the steps:
(1) set gsm gpa(guest physical addrress) 0xDB000000;
(2) get gsm hpa(host physical addrress);
(3) build EPT mapping for gsm.
v1 -> v2:
* initialize the EPT mapping for passthrough GPU gsm region
in passthru_init instead of reading the BDSM config space
v2 -> v3:
* add EPT unmap when deinit
* change some micro name
Tracked-On: #4360
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Now the PCI bar uses the hardcoded prefetch property
for the pass-through device.
This doesn't work when trying to load windows GPU driver
for the pass-through GPU device.
For pass-through devices,
set the bar prefetchable property the same as physical bar.
Tracked-On: #4282
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
When update pci bar addr,
DM may change the bar property by func pci_cfgrw.
PCI spec chapter 'Base Addresses' shows
bits 0~3 are readonly of memeory space BAR,
so this change won't happen.
This patch ensures pci bar property unchanged
when update pci bar addr.
Tracked-On: #4282
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
use acrn-dm logger function instread of perror,
this helps the stability testing log capture.
Tracked-On: #4098
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Do reset for passthrough PCI device by default when assigning it to post-launched
VM:
1. modify opt "reset" to "no_reset" -- could enable no_reset for debug only
2. remove "ptdev_no_reset" opt. It could be replaced by setting "no_reset" for
each passthrough device.
Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This patch refactors the CMD_OPT_LAPIC_PT case branch
to explicity add the dependency of option RTVM at the
same branch, it is decoupled from the next case branch
to comply with strict code standard and improve the
code readability.
Tracked-On: #4283
Signed-off-by: Gary <gordon.king@intel.com>
Now the GVT already tries to reserve the region.
the problem is that the region should be
reflected in PCI BUS0 memlimit32 and updated to DSDT table.
As the GVT PCI bar0/2 is in reserved region
and not updated to memlimit32 in DSDT table,
the problem is triggered.
Tracked-On: projectacrn#4227
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Add the below flags, they are needed in -O2:
-fno-delete-null-pointer-checks:
* tells the compiler NOT to assume that null pointer deference does
not exist.
* Without this flag, below case cannot be detected:
a pointer might point to nullsometime during run-time and if there
is no validation for that pointer, it will cause the program to crash.
Since we don’t receive an error message saying that a pointer is
pointing to null, we will have a hard time trying to find the problem.
-fwrapv:
* tells the compiler that signed overflow always wraps.
* Without this flag, x + 10 > x will always be true for signed x.
With the flag, x + 10 > x is not always be true, as the overflow is
defined for x, and it could wrap.
Tracked-On: #4194
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Need to enable gvt bar registration, so remove the previous workaround patch.
Tracked-On: projectacrn#4005
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The current design has the following problem:
uos kernel may update gvt bars' regions,
but ACRN-DM doesn't know this update.
ACRN-DM only know out-of-date gvt bar regions,
For simplicity, mark these bar regions as OOD bar regions.
uos kernel may allocate OOD bar regions for
other pci devices, which will result in ACRN-DM
bar regions inconsistency with uos kernel.
The new design is the following:
When other pci device update bar regions
(1) ACRN-DM updates gvt bars' regions
provided by a system file.
(2) ACRN-DM updates this pci device bar regions
v5 -> v6:
* add more comments
v4 -> v5:
* remove & for callback func assignment
v3 -> v4:
* compare gpu bar address to avoid unnecessary
* unregistered/registered operation
v2 -> v3:
* call unregister_bar and register_bar when update gvt bars
* update gvt reserved regions when update gvt bars
Tracked-On: projectacrn#4005
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
ACRN-DM has reserved gvt bar regions.
This patch ensures other pci devices' bar regions
won't overlap with reserved bar regions.
v6 -> v7:
* rename some struct and func
v5 -> v6:
* remove outdated comment
* add comments for code reading
* code cleaning about gvt bar0 and bar2 size
v4 -> v5:
* rename adjust_bar_region and adjust_bar_region_by_gvt_bars
* change adjust_bar_region_by_gvt_bars interface for code cleaning
v3 -> v4:
* add static struct gvt_region instead of definition or pointer array.
v2 -> v3:
* repalce pci_emul_alloc_bar with gvt_reserve_resource when allocate gvt bars
* use register_bar to detect if gvt bars confilts with pci devices
v1 -> v2:
* don't limit the gvt bar type is MEM32 when deal with pci bar
* add is_two_region_overlap func to detect if two regions overlap
* add region array to store gvt bar0 and bar2 regions
Tracked-On: projectacrn#4005
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The current design has the following problem:
gvt uses some pci bar regions,
but ACRN-DM isn't aware of these regions.
So ACRN-DM may allocate these regions for other pci devices,
which will result in other pci devices bar regions
overlap with gvt bar regions.
The new design is the following:
(1) ACRN-DM reads gvt bar regions
which are provided by physical gpu;
(2) ACRN-DM reserves gvt bar regions
v6 -> v7:
* use array to store reserved bar regions
* rename some struct and func
v5 -> v6:
* rename enable_gvt to gvt_enabled
* add a interface to reserve bar regions
* reserve gvt bar regions
Tracked-On: projectacrn#4005
Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
use acrn-dm logger function instread of fprintf,
this helps the stability testing log capture.
Tracked-On: #4098
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Cao Minggui <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Use acrn-dm logger function instread of printf,
this helps the stability testing log capture.
Tracked-On: #4098
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Cao Minggui <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
The parameter of intel_pstate should be 'disable' instead of 'disabled'.
This patch fixes it.
Tracked-On: #4094
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
The acrn vhm driver will convert all PCI configure space access to
PCI_CFG type, so the pci_emul_cfgaddr and pci_emul_cfgdata will nerver
be invoked. Remove these useless functions.
Tracked-On: #3999
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Lock should be held till all the mmap operations are done. This is to
avoid the mmap failure when multiple guests are created concurrently.
For example consider the following case in which vm1 and vm2 are
created by acrnd concurrently:
- vm1 is created with 4G+2M memory.
- 4G+2M memory is reserved in hugetlb now and vm1 continues to
allocate memory for the lowmem without lock held.
- 2G memory is allocated by vm1 for its lowmem, and 2G+2M memory
is available in hugetlb.
- At this time vm2 is created with 1G+2M memory. It finds that enough
memory is reserved (2G+2M), so it does not try to reserve more
memory.
- vm2 allocates some memory for its lowmem/highmem/ovmf.
- vm1 tries to allocate memory for its highmem/ovmf, the allocation
will fail. vm1 creation failed in this case.
Tracked-On: #3947
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The device model generating ACPI table use the old ASL
standard(version:20190816), then the iasl in clearlinux(version:31360)
is 20191018, it can't disassemble the ACPI table compiled by old
standard.
Tracked-On: #3933
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Reviewed-by: Fengwei Yin <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
In function crb_reg_write() in tpm_rbc.c
'tpm_vdev->request_mutex' will potentially kept
in locked state after crb_reg_write() returns.
Tracked-On: #3825
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Yadong Qi <yadong.qi@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Wrong NVMe bdf info of KBLNUC7i7DNH is modified by mistake; so change it back.
Tracked-On: #3827
Reviewed-by: binbin.wu@intel.com
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
In acrn_load_elf(), file pointer 'fp' is kept in
open state before exiting if 'load_elf32()' is executed,
this patch is to fix this bug.
Tracked-On: #3817
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
slot value should be checked in range before used to access
bi->slotinfo[].
Tracked-On: #3822
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
DIR handler is referenced after release, need to be adjusted before
released.
Tracked-On: #3821
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
When removing node in list, list_foreach_safe will be safer than
LIST_FOREACH.
Tracked-On: #3778
Signed-off-by: Junhao Gao <junhao.gao@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
int snprintf(char *str, size_t size, const char *format, ...)
The functions snprintf() write at most size bytes (including the
terminating null byte('\0')) to str.
only when returned value of snprintf is non-negative and less than size,
the string has been completely written.
Tracked-On: #3789
Signed-off-by: Junhao Gao <junhao.gao@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The default script is for nvme passthrough to RT_LaaG; you can change it
to sata or using virtio_blk
Tracked-On: #3575
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
Reviewed-by: binbin.wu@intel.com; kaige.fu@intel.com
After Windows 10, version 1607, the cross-signed drivers are forbiden
to load when secure boot is enabled.
Details please refer to
https://docs.microsoft.com/en-us/windows-hardware/drivers/install/kernel-mode-code-signing-policy--windows-vista-and-later-
That means the kvm-guest-drivers-windows can't work when secure boot enabled.
So we found another windows virtio FE drivers from Oracle to resolve this issue
but have to change another subsystem vendor ID for the virtio BE services.
This patch introduces a new DM CMD line "--windows" to launch WaaG with Oracle virtio devices including
virtio-blk, virtio-net, virtio-input instead Redhat. It can make virtio-blk, virtio-net and virtio-input
devices work when WaaG enabling secure boot.
Tracked-On: #3583
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
Currently, DM only access /sys/kernel/mm/hugepages/hugepages-2048kB/
entries according to its own huge page requirement. So it could have
following race issue:
DM1 DM2
read nr pages
read nr pages
write DM2 nr pages
write DM1 nr pages
Suppose we should write DM1 + DM2 nr page to kernel sysfs interface
to reserve enough huge page (DM1 + DM2). But actually only reserve
huge page requested by DM1. Which could trigger one VM can't boot.
We can easily hit this issue if we enable multiple UOS auto boot
because more than one VM are started at almost same time.
We add file lock to make sure huge page reserving in DM atomic.
Tracked-On: #3729
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
- GvtGopDxe: Fix crash if failed to get a valid mode
- GvtGopDxe: Enable GOP with parameters from vgt interface
- OvmfPkg/GvtGopDxe: Add GvtGopDxe skeleton driver
- Add back NVME support
- Update Readme.md
Tracked-On: #3700
Signed-off-by: Peter Fang <peter.fang@intel.com>
This patch is used to support multiple Event Ring Segment Table (ERST).
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This patch only changes some names of varaibles about Event Ring Segement
Table (ERST), and doesn't modify any code logic.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The Windows 10 feeds back quicker than Linux OS when error occured
due to device disconnecting, it will quickly reset the xHCI controller
before the DM starts to emulate disconnect event and it may cause some
unexpected errors such as crash.
This patch will do one more check when error happens, if the error
is induced by device disconnecting, the DM will not report error and
just wait until the disconnect event is reported to the guest. This
change could produce the correct hehavior as we expected.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The block count of the struct usb_xfer is hard coded by the macro
USB_MAX_XFER_BLOCKS (1024), it wastes memory if 1024 blocks are
allocated for low speed transfer such as control transfer or interrupt
transfer. This patch introduces a new method to allocate different
number of blocks according to different endpoint type.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The overrun and underrun event are used in the timing control machanism,
this patch is used to implement this feature.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The Block Event Interrupt (BEI) bit in the TRB descriptor could
delay the triggering of interrupt. For most OSes, the native
driver for xHCI will use this bit to optimize the IO performence,
due to reduction of number of interrupts.
But in Linux, the native xHCI driver for Intel brand controller
doesn't use this bit. It is fine for the native scenario due to
most work is completed by hardware. But in virtualization scenario,
it is almost impossible to support heavy data IO such as high
resolution video recording (ISOC transfer).
Hence, this issue is solved by a 'quirk' when the intel hardware is
emulated (when vendor id is set as 0x8086). For other cases, a
virtal hardware called 'ACRN xHCI' is emulated, and both Linux and
Windows will use BEI bit by default.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
The old logic to emulate MFINDEX register is not right, this patch
is used to fix it.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Just changed the name of the variable and didn't change any emulation
code logic.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
In the struct usb_block, there are some fields such as 'ccs',
'streamid', which should not be seen in the USB layer. This
patch intruduces new struct xhci_block to include the variables
for xHCI emulation.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
When control transfer is detected and an unnecessary reset of
struct usb_xfer is conducted. This behavior is not necessary
and this patch is used to remove it.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Introduce helper functions to make code shorter and cleaner.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
In Windows OS, there are many non-data blocks (EVENT DATA) during the USB
data transfer process, which is very different from the Linux conterpart.
To support both OS, the data processing logic is changed with the help of
newly introduced enum usb_block_type.
Tracked-On: #3628
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
Junming Liu