Improve the legacy vuart code. The legacy vuart insert the declaration
without checking if it's enabled. Refined the logic that if the legacy
is disabled, simply do not declare.
Tracked-On: #5425
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
generic
Add console and communication vuarts to:
misc/vm_configs/xmls/config-xmls/generic/<scenario>.xml
misc/vm_configs/xmls/config-xmls/template/<scenario>.xml
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Check if the scenario xmls configure pci vuarts properly
Sanity check of scenario xml:
1. check the format of console and communication vuarts
2. legacy vuart0 and console vuart0 cannot be eabled at the same time
3. legacy vuart1 and communication vuart1 cannot be enabled at the
same time
4. Any vuart should not connect to any type of vuart0
5. Every vuart can only connect to enabled vuart<idx> (idx > 0)
Tracked-On: #5425
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
Add pci vuart to launch script if the pci vuart is enabled.
Add pci vuart sanity check for launch script:
- vuart0 and console vuart cannot be enabled at the same time
- vuart1 cannot be eabled if the legacy vuart 1 is enabled
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
- Find unused bdf for SOS and pre-launched VM's pci vuart if it's
enabled
- The vuart cannot detect the function difference, find the unused vbdf
based on "dev" increment
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Allocate unused vbar for pci based vuarts when the it's enabled for SOS
and/or pre-launched VMs.
- vuart needs 2 bar, both are 4k size
- for SOS, find unused vbar in the range which is assigned to pci host
bridge. The allocated vbar cannot have confilicts with any existing pci devices
- for pre-launched VMs, find unused vbar in the range 0x80000000 to
0xfffffff. The alloacted vbar cannot have confilicts with any
passthrough devices and mmio
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
when fix the issue of _PM_SystemS5 with life_mngr fail,
the vuart1(tty) item was devided into two parts, the last
part "/dev/tty*" which need to get will be added to the
end, so it should be handled singly, but it will be added
to other item too, such as vuart1(pty).
Tracked-On:#5366
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Multiple devices could be nested under the same range. Skip remove if
the device is removed already
Tracked-On: #5437
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Changes:
1. assign 3 CPUs for WaaG on hybrid_rt scenario;
2. Passthrough NVME@9:0.0 for VM0 on hybrid_rt scenario;
3. Change rootfs from partition2 to partition3;
Tracked-On: #5390
Signed-off-by: Liang Yi <yi.liang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Support enable ivshmem for SOS. Insert the ivshmem device information if
it is enabled.
1. get ivshmem vbar based:
- vbar[0] is size 0x100
- vbar[2] is specified MB size
2. get vbdf for ivshmem device
Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
Add following to default output scenarios vm_configurations.c:
- pci_dev_num
- pci_devs = sos_pci_devs
Both was defineded in CONFIG_SOS_VM.
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
- Refactor pci_dev_c.py to insert devices information per VMs
- Add function to get unused vbdf form bus:dev.func 00:00.0 to 00:1F.7
Add pci devices variables to vm_configurations.c
- To pass the pci vuart information form tool, add pci_dev_num and
pci_devs initialization by tool
- Change CONFIG_SOS_VM in hypervisor/include/arch/x86/vm_config.h to
compromise vm_configurations.c
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Allocate unused vbar for SOS and pre-launched VMs.
- For SOS, find unused vbar in the range which is assigned to pci host
bridge. The allocated vbar cannot have confilicts with any existing pci devices
- For pre-launched VMs, find unused vbar in the range 0x80000000 to
0xfffffff. The alloacted vbar cannot have confilicts with any
passthrough devices and mmio.
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
automatically get PTCT table from native environment for the usage
of pre-launched VMs.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
fill physical PTCT table into pre-launched vACPI table when PSRAM
is configured to passthrough to pre-launched RTVM.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
add PSRAM configs in xmls, only enable PSRAM and passthrough to
pre-launched RTVM for hybrid_rt scenario on tgl-rvp board.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Config tool UI will do mutually exclusive check the legacy vuart 0/1 and
PCI vuart 0/1 to make sure there is no legacy vuart and PCI vuart are
used at the same time for VMs.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add PCI VUART config for post-launched VMs in launch config UI. Users
can configure the console_vuart, configure or dynamically add or remove
communication_vuart based on the communication vuarts which are configured
from the scenario xml.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add PCI VUART dynamic config for VMs in scenario config UI, keep legacy
VUART config. PCI vuart base can be set to INVALID_PCI_BASE and PCI_VUART;
users will configure the target_vm_id and target_vuart_id when PCI vuart
base is set to PCI_VUART; users can dynamically add or delete PCI vuart
for VMs.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
changes:
1. Change SOS VM rootfs to nvme0;
2. Change hybrid_rt scenario VM0 mem size to 1GB;
Tracked-On: #5238
Signed-off-by: Victor Sun <victor.sun@intel.com>
The messages from the SOS socket can be safely read into the entire read
buffer.
Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
- Since de-privilege boot is removed, we no longer need to save boot
context in boot time.
- cpu_primary_start_64 is not an entry for ACRN hypervisor any more,
and can be removed.
Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
update tgl-rvp.xml for tgl boards with IFWI of tsn version to enable
the embeded tsn device.
Tracked-On: #5427
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add functionality to get free vbar base for the vmsix devices.
- The devices size is 4k.
- The mmio range for non SOS VM is 2G to 4G
- The mmio range for SOS is depended on the range which is assigned to
PCI bus hostbridge
- The next vbar index is based on last device vbar index vbar_i
Tracked-On: #5422
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL
boards, add 1 YaaG and assign 1 more pcpu for WaaG.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt scenario for
WHL/EHL/TGL/CFL boards.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.
Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
Add cfl-k700-i7 hybrid_rt xml to support ACRN hybrid_rt scenario on
cfl-k700-i7 board.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
There is no default xml for hybrid_rt to to generate the
script of posted launch WaaG.
Tracked-On: #5336
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Yang,Yu-chu