Stray non-ASCII characters can creep in when pasting from Word or Google
Docs, particularly for "smart" single and double quotes and non-breaking
spaces. Change these to their ASCII equivalents. Also fixed some very
long lines of text to wrap at 80-ish characters.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Modify launch config tool to support passthroug GVT for WaaG by default.
Tracked-On: #4625
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Waag will send NMIs to all its cores during reboot. But currently,
NMI cannot be injected to vcpu which is in HLT state.
To fix the problem, need to wakeup target vcpu, and inject NMI through
interrupt-window.
Tracked-On: #4620
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Align the implementation to SDM Vol.3 4.1.1.
Also this patch fixed a bug that doesn't check paging status first
in some cpu mode.
Tracked-On: #4628
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
now the actual address does not match with the MAP file
if enable CONFIG_RELO when there are some exceptions,
this patch print the delta between the actual load addess
and CONFIG_HV_RAM_START.
Tracked-On: #4144
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Currently vlapic_build_id() uses vcpu_id to retrieve the lapic_id
per_cpu variable:
vlapic_id = per_cpu(lapic_id, vcpu->vcpu_id);
SOS vcpu_id may not equal to pcpu_id, and in that case it runs into
problems. For example, if any pre-launched VMs are launched on PCPUs
whose IDs are smaller than any PCPU IDs that are used by SOS.
This patch fixes the issue and simplify the code to create or get
vapic_id by:
- assign vapic_id in create_vlapic(), which now takes pcpu_id as input
argument, and save it in the new field: vlapic->vapic_id, which will
never be changed.
- simplify vlapic_get_apicid() by returning te saved vapid_id directly.
- remove vlapic_build_id().
- vlapic_init() is only called once, merge it into vlapic_create().
Tracked-On: #4268
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Maintain a per-pCPU array of vCPUs (struct acrn_vcpu *vcpu_array[CONFIG_MAX_VM_NUM]),
one VM cannot have multiple vCPUs share one pcpu, so we can utilize this property
and use the containing VM's vm_id as the index to the vCPU array:
In create_vcpu(), we simply do:
per_cpu(vcpu_array, pcpu_id)[vm->vm_id] = vcpu;
In offline_vcpu():
per_cpu(vcpu_array, pcpuid_from_vcpu(vcpu))[vcpu->vm->vm_id] = NULL;
so basically we use the containing VM's vm_id as the index to the vCPU array,
as well as the index of posted interrupt IRQ/vector pair that are assigned
to this vCPU:
0: first vCPU and first posted interrupt IRQs/vector pair
(POSTED_INTR_IRQ/POSTED_INTR_VECTOR)
...
CONFIG_MAX_VM_NUM-1: last vCPU and last posted interrupt IRQs/vector pair
((POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U)/(POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U)
In the posted interrupt handler, it will do the following:
Translate the IRQ into a zero based index of where the vCPU
is located in the vCPU list for current pCPU. Once the
vCPU is found, we wake up the waiting thread and record
this request as ACRN_REQUEST_EVENT
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This is a preparation patch for adding support for VT-d PI
related vCPU scheduling.
ACRN does not support vCPU migration, one vCPU always runs on
the same pCPU, so PI's ndst is never changed after startup.
VCPUs of a VM won’t share same pCPU. So the maximum possible number
of VCPUs that can run on a pCPU is CONFIG_MAX_VM_NUM.
Allocate unique Activation Notification Vectors (ANV) for each vCPU
that belongs to the same pCPU, the ANVs need only be unique within each
pCPU, not across all vCPUs. This reduces # of pre-allocated ANVs for
posted interrupts to CONFIG_MAX_VM_NUM, and enables ACRN to avoid
switching between active and wake-up vector values in the posted
interrupt descriptor on vCPU scheduling state changes.
A total of CONFIG_MAX_VM_NUM consecutive IRQs/vectors are reserved
for posted interrupts use.
The code first initializes vcpu->arch.pid.control.bits.nv dynamically
(will be added in subsequent patch), the other code shall use
vcpu->arch.pid.control.bits.nv instead of the hard-coded notification vectors.
Rename some functions:
apicv_post_intr --> apicv_trigger_pi_anv
posted_intr_notification --> handle_pi_notification
setup_posted_intr_notification --> setup_pi_notification
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
Fill in posted interrupt fields (vector, pda, etc) and set mode to 1 to
enable VT-d PI (posted mode) for this ptdev.
If intr_src->pi_vcpu is 0, fall back to use the remapped mode.
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
Given the vcpumask, check if the IRQ is single destination
and return the destination vCPU if so, the address of associated PI
descriptor for this vCPU can then be passed to dmar_assign_irte() to
set up the posted interrupt IRTE for this device.
For fixed mode interrupt delivery, all vCPUs listed in vcpumask should
service the interrupt requested. But VT-d PI cannot support multicast/broadcast
IRQs, it only supports single CPU destination. So the number of vCPUs
shall be 1 in order to handle IRQ in posted mode for this device.
Add pid_paddr to struct intr_source. If platform_caps.pi is true and
the IRQ is single-destination, pass the physical address of the destination
vCPU's PID to ptirq_build_physical_msi and dmar_assign_irte
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
Add platform_caps.c to maintain platform related information
Set platform_caps.pi to true if all iommus are posted interrupt capable, false
otherwise
If lapic passthru is not configured and platform_caps.pi is true, the vm
may be able to use posted interrupt for a ptdev, if the ptdev's IRQ is
single-destination
Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
PCI devices with 64-bit MMIO BARs and requiring large MMIO space
can be assigned with physical address range at the very high end of
platform supported physical address space.
This patch uses the board info for 64-bit MMIO window as programmed
by BIOS and constructs 1G page tables for the same.
As ACRN uses identity mapping from Linear to Physical address space
physical addresses upto 48 bit or 256TB can be supported.
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add 64-bit MMIO window related MACROs to the supported board files
in the hypervisor source code.
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Rounding HI_MMIO_START, HI_MMIO_END to the closest 1G. This avoids
round up logic in the hypervisor.
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
EPT table can be changed concurrently by more than one vcpus.
This patch add a lock to protect the add/modify/delete operations
from different vcpus concurrently.
Tracked-On: #4253
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Using a root-level /404.html as a redirect to the /latest/404.html
causes the URL shown in the browser to change so you can't see what the
error-causing URL was. Instead of a redirect, copy the /latest/404.html
generated by Sphinx to /404.html and edited with a <base> tag that
specifies a base URL for all relative URLs on a page.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The VMCS field is an embedded array for a vCPU. So there's no need to check for
NULL before use.
Tracked-On: #3813
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Developers using google search can accidentally find older versions of
documents and lead to confusion. While we do maintain previous release
documentation on the site, we should have a preference for the latest
documentation when using external search engines. (Note the on-site
search always returns version-specific results.)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Fix display of 404 errors on mobile phones. Also added some additional
wording for reporting errors. (Last change, I hope :)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add styles for multi-column display, and for auto-numbered instruction
steps used in some other projects.
Also updating the used page width to 1100px following experience
improvements noted on other sites. Pages are hard to read when
displayed full-screen on really wide monitors.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Some additional tweaks to the publish script, image, and root-level
redirect to fix a redirect recursion problem.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add a site-wide custom error page for broken references within the site.
Besides giving a better user experience, it's also easier to track
broken links to the site using google analytics (looking for hits to the
404.html page and noticing the referrer.
Note we only "publish" the custom 404.html when publishing the latest
documents (not for released versions) so we always get the latest
left-navigation menu when a 404 error occurs.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Launch config should relay on library/common.py and launch_cfg_lib,
then remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Scenario config should relay on library/common.py and scenario_cfg_lib,
then remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Board config should relay on library/common.py and board_cfg_lib, then
remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
For purpose to refine the library/common and xx_cfg_lib, should have
to expands parameters and functions to common.py firstly.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Conceptually, the devices unregistration sequence of the shutdown process should be
opposite to create.
Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Adding a big box for the glossary disturbed the home page layout and is
overkill for this one document. Adding the glossary to the left
navigation menu is sufficient.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This patch does the following
1) Removes the limitation on BAR size for 1 GB
2) Align the BAR address to the BAR size
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
As we did in commit: 697f3fc09f, need
to update IOMEM_INFO for tgl-rvp.
Tracked-On: #4582
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Customer might have specific folder where stores their own configurations
for their customized scenario/board, so add TARGET_DIR parameter to support
option that build hyprvisor with specified configurations.
So valid usages are: (target = all | hypervisor)
1. make <target>
2. make <target> KCONFIG_FILE=xxx [TARGET_DIR=xxx]
3. make <target> BOARD=xxx SCENARIO=xxx [TARGET_DIR=xxx]
4. make <target> BOARD_FILE=xxx SCENARIO_FILE=xxx [TARGET_DIR=xxx]
5. make <target> KCONFIG_FILE=xxx BOARD_FILE=xxx SCENARIO_FILE=xxx [TARGET_DIR=xxx]
If TARGET_DIR parameter is not specified in make command, hypervisor will be
built with board configurations under hypervisor/arch/x86/configs/ and scenario
configurations under hypervisor/scenarios/. Moreover, the configurations would
be overwritten if BOARD/SCENARIO files are specified in make command.
If TARGET_DIR parameter is specified in make command, hypervisor will be built
with configuration under that folder if no BOARD/SCENARIO files are specified.
When BOARD/SCENARIO files are available in make command, the TARGET_DIR is used
to store configurations that BOARD/SCENARIO file provided, i.e. Configurations
in TARGET_DIR folder will be overwritten.
Tracked-On: #4517
Signed-off-by: Victor Sun <victor.sun@intel.com>
When user use make parameters to specify BOARD and SCENARIO, there might
be some conflict because parameter of KCONFIG_FILE/BOARD_FILE/SCENARIO_FILE
also includes BOARD/SCENARIO info. To simplify, we only alow below valid
usages:
1. make <target>
2. make <target> KCONFIG_FILE=xxx
3. make <target> BOARD=xxx SCENARIO=xxx
4. make <target> BOARD_FILE=xxx SCENARIO_FILE=xxx
5. make <target> KCONFIG_FILE=xxx BOARD_FILE=xxx SCENARIO_FILE=xxx
Especially for case 1 that no any parameters are specified:
a. If hypervisor/build/.config file which generated by "make menuconfig"
exist, the .config file will be loaded as KCONFIG_FILE:
i.e. equal: make <target> KCONFIG_FILE=hypervisor/build/.config
b. If hypervisor/build/.config file does not exist,
the default BOARD/SCENARIO will be loaded:
i.e. equal: make <target> BOARD=$(BOARD) SCENARIO=$(SCENARIO)
Tracked-On: #4517
Signed-off-by: Victor Sun <victor.sun@intel.com>
When user finish doing "make menuconfig", the .config file is saved in
acrn-config/hypervisor/build/ by default. So current Makefile will check
whether this customized .config file exists and then continue to do
following make process. But this might not true in the real user case,
user could put this customized .config file anywhere.
To resolve this problem, the patch add a KCONFIG_FILE parameter to handle
such case. When KCONFIG_FILE is specified, hypervisor could build hypervisor
with the specific configuration file.
Tracked-On: #4517
Signed-off-by: Victor Sun <victor.sun@intel.com>
Added "vcpu_clos" to configuration XML, here is an example of VM2 with 2 vCPUs:
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>1</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
A macro will be generated in vm_configuration.h:
#define VM2_VCPU_CLOS {1U, 0U}
And the macro will be used in vm_configuration.c:
struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
...
{
...
.clos = VM2_VCPU_CLOS,
...
}
}
Tracked-On: #4566
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
This commit allows hypervisor to allocate cache to vcpu by assigning different clos
to vcpus of a same VM.
For example, we could allocate different cache to housekeeping core and real-time core
of an RTVM in order to isolate the interference of housekeeping core via cache hierarchy.
Tracked-On: #4566
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Chen, Zide <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
David B. Kinder