Virtio modern changed the virtqueue cofiguration precedures. GPA
of descriptor table, available ring and used ring are written to
common configuration registers separately. A final write to
Q_ENABLE register triggered initialization of the virtqueue on
the backend device.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
virtio_set_modern_bar is an external interface that backend virtio
driver can call to initialize the PCI capabilities and PCI bars
defined in the virtio 1.0 spec.
The following are done in the function:
- 5 PCI capabilities are added to the PCI configuration space of the
virtio PCI device. (common/isr/device_specific/notify/cfg_access)
- A 64-bit MMIO bar is allocated to accommodate the registers defined
in the 4 PCI capabilities. (cfg_access capability does not require
MMIO.)
- If use_notify_pio is true, a PIO notify capability is added to the
PCI configuration space and a PIO bar is allocated for it
accordingly.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Struct virtio_base and struct virtio_vq_info are expanded to support
virtio 1.0 framework. The BAR layouts of virtio legacy/transitional/
modern are introduced as well.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch adds virtio 1.0 data structures and macros according to
virtio spec v1.0 cs4. Part of them are referenced from Linux's
BSD-licensed include/uapi/linux/virtio_pci.h
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
pci_emul_add_capability is needed by virtio 1.0 framework to add
pci vendor capability from outside of pci core.
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The trusty enabled or not will be passed to HV
with create vm hypercall. It's passed to vSBL within
config page also.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Some guests needs guest partition info passed to support
A/B boot. DM needs to load guest partition info from file
and pass to vsbl.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
There are two things here:
1. Enable basic vsbl boot functionality.
2. add long option to DM to specific vsbl file. So DM could
choice to boot guest with vsbl.
It's hard to find a suitable short option. So only long option
is supported for vsbl file name option.
If long option "--vsbl='vsbl_file_name'" is given in DM
commandline, the "vsbl_file_name" will be loaded by DM
first and running. vsbl will be response to lead guest to
next boot stage.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Will update e820 table to mark the address ACPI specific type.
Also need pass ACPI table start address and size to vsbl.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
To align with file name, acrn_sw_load_direct() is changed
to acrn_sw_load_bzimage().
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The common loader code is put to sw_load_common.c
The loader code for directly kernel loading is put to sw_load_bzimage.c
The further change for SBL will be put to sw_load_sbl.c
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Some virtio PCI devices can change the device configuration state, as
reflected in the device-specific configuration region of the device. In
this case:
* If MSI-X capability is disabled:
1. Set the second lower bit of the ISR Status field for the device
2. Send the appropriate PCI interrupt for the device.
* If MSI-X capability is enabled:
1. If config_msix_vector is not NO_VECTOR, request the appropriate
MSI-X interrupt message for the device, config_msix_vector sets
the MSI-X Table entry number.
A single interrupt MAY indicate both that one or more virtqueue has been
used and that the configuration space has changed.
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Jian Jun Chen