Commit Graph

2940 Commits

Author SHA1 Message Date
Yonghua Huang a6e666dbe7 hv: remove hardcoding of SW SRAM HPA base
Physical address to SW SRAM region maybe different
 on different platforms, this hardcoded address may
 result in address mismatch for SW SRAM operations.

 This patch removes above hardcoded address and uses
 the physical address parsed from native RTCT.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang a6420e8cfa hv: cleanup legacy terminologies in RTCM module
This patch updates below terminologies according
 to the latest TCC Spec:
  PTCT -> RTCT
  PTCM -> RTCM
  pSRAM -> Software SRAM

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-01-28 11:29:25 +08:00
Yonghua Huang 806f479108 hv: rename RTCM source files
'ptcm' and 'ptct' are legacy name according
   to the latest TCC spec, hence rename below files
   to avoid confusing:

  ptcm.c -> rtcm.c
  ptcm.h -> rtcm.h
  ptct.h -> rtct.h

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-01-28 11:29:25 +08:00
Junjie Mao 0de004e5c9 Makefile: fix build issues due to reorg of misc/
This patch fixes the following issues that break the build system:

 1. The tag of the root nodes of board/scenario XML files are still acrn-config,
    not config_tools. This patch reverts the XPATH that refers to these nodes.

 2. HV_PREDEFINED_BOARD_DIR now also relies on BOARD which may not be
    available at the time the variable is defined. As both board and
    scenario XML files are placed under the same directory, this patch
    refines the path calculation logic to get rid of mixing variables of
    the different flavors.

Tracked-On: #5644
Fixes: 97c9b24030 ("acrn-config: Reorg config tool folder")
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-01-28 10:20:38 +08:00
Liang Yi e8a76868c9 hv: modularization: remove global variable efiloader_sig.
Simplify multiboot API by removing the global variable efiloader_sig.
Replaced by constant at the use site.

Tracked-On: #5661
Signed-off-by: Yi Liang <yi.liang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 67926cee81 hv: modularization: remove include/boot.h.
Remove include/boot.h since it contains only assembly variables that
should only be accessed in arch/x86/init.c.

Tracked-On: #5661
Signed-off-by: Yi Liang <yi.liang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 1de396363f hv: modularization: avoid dependency of multiboot on zeropage.h.
Split off definition of "struct efi_info" into a separate header
file lib/efi.h.

Tracked-On: #5661
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 7c02dc0801 hv: modularization: remove multiboot dependency on e820.h.
This is done by adding the MAX_MMAP_ENTRIES macro in multiboot.h.
This macro has to be sync-ed with E820_MAX_ENTRIES manually though.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 681688fbe4 hv: modularization: change of multiboot API.
The init_multiboot_info() and sanitize_multiboot_ifno() APIs now
require parameters instead of implicitly relying on global boot
variables.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 66599e0aa7 hv: modularization: multiboot
Calling sanitize_multiboot() from init.c instead of cpu.c.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi c23e557a18 hv: modularization: make parse_hv_cmdline() an internal function.
This way, we void exposing acrn_mbi as a global variable.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi f6aa0a70c5 hv: modularization: remove get_rsdp_ptr() from multboot API.
This function is a derivative of get_multiboot_info().

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 101004603a hv: modularization: hide "struct multiboot_info"
Move "struct multboot_info" from multiboot.h into multboot.c.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 8f9ec59a53 hv: modularization: cleanup boot.h
Move multiboot specific declarations from boot.h to multiboot.h.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 153e83a19e hv: modularization: multiboot private header
Create multiboot_pri.h and move the relevant declarations into this
file.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Liang Yi 0ace40b679 hv: modularization: move multiboot files to dedicate sub-directory
Create a multiboot module under the boot directory and move multiboot
files as part of this.

Tracked-On: #5661
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-01-27 15:59:47 +08:00
Xie, nanlin 97c9b24030 acrn-config: Reorg config tool folder
Remove vm_configs folder and move all the XML files and generic code example into config_tools/data

Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
2021-01-27 11:08:28 +08:00
Junjie Mao 775214b710 Makefile: create and apply patches to generated sources
In order to enable changing the generated C configuration files manually,
this patch introduces the target `diffconfig` to the build system.

After generating the configuration files, a developer can manually modify
these sources (which are placed under build/configs) and invoke `make
diffconfig` to generate a patch that shows the made differences. Such
patches can be registered to a build by invoking the `applydiffconfig`
target. The build system will always apply them whenever the configuration
files are regenerated.

A typical workflow to create a patch is as follows.

    # The pre_build target relies on generated configuration files
    hypervisor$ make BOARD=xxx SCENARIO=yyy pre_build

    (manually edit files under build/configs/boards and
      build/configs/scenarios)

    hypervisor$ make diffconfig   # Patch generated to build/config.patch
    hypervisor$ cp build/config.patch /path/to/patch

The following steps apply apply the patch to another build.

    hypervisor$ make BOARD=xxx SCENARIO=yyy defconfig
    hypervisor$ make applydiffconfig PATCH=/path/to/patch-file-or-directory
    hypervisor$ make

After any patch is registered for a build, the configuration files will be
automatically regenerated the next time `make` is invoked.

To show a list of registered patches for generated configuration files,
invoke `make applydiffconfig` without specifying `PATCH`.

v2:
 * Add target `applydiffconfig` which accepts a PATCH variable to register
   an arbitrary patch file or a directory containing patch file(s) for a
   build. `.config_patches` is no longer used.

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-01-20 17:58:00 +08:00
Junjie Mao 866c0881a3 Makefile: generate C configuration files at build time
This patch makes the build system of the hypervisor to cache the board and
scenario XML files in the build directory and generate C configuration
files from them at build time. The C configuration files that are cached in
the git repo is no longer used or updated. Paths to these generated files
in the prebuild Makefile is updated accordingly.

The following targets are introduced or modified.

    * defconfig: Copy default configuration XMLs to the build directory and
                 generate C configuration files.

    * oldconfig: No action.

    * menuconfig: Print a message to redirect users to use the config app
                  and exit.

    * showconfig: Print the BOARD, SCENARIO and RELEASE configured for the
                  current build.

    * update_config: No action.

    * (default): Build the hypervisor with defined configurations.

The following variables can be set on the command line to specify the
default configuration to be used.

    * BOARD: Either a name of the target board or a path to a customized
             board XML. When a board name is specified, the board XML file
             is expected to be available under
             misc/acrn-config/xmls/board-xmls.

    * SCENARIO: Either a name of the scenario of a path to a customized
                scenario XML. When a scenario name is specified, the
                scenario XML file is expected to be available under
                misc/acrn-config/xmls/config-xmls/$(BOARD).

    * BOARD_FILE: Path to the board XML file to be used. This is now
                  obsoleted as BOARD provides the same functionality.

    * SCENARIO_FILE: Path to the scenario XML file to be used. This is now
                     obsoleted as BOARD provides the same functionality.

BOARD/SCENARIO or BOARD_FILE/SCENARIO_FILE shall be used in pair, and
BOARD_FILE/SCENARIO_FILE shall point to valid files when specified. Any
violation to those constraints will stop the build with error
messages. When BOARD/SCENARIO and BOARD_FILE/SCENARIO_FILE are both defined
on the command line, the former takes precedence as the latter are to be
obsoleted.

Additionally, users can define the RELEASE variable to specify a debug or
release build. In case a previous build exists but is configured for a
different build type, the build system will automatically update the
scenario XML and rebuild the sources.

This patch also includes the following tweaks:

    1. Do not use `realpath` to process search paths for generated
       headers. `realpath` only accepts paths of existing files, while the
       directories for generated headers may not be created at the time the
       search paths are calculated.
    2. Always expect `pci_dev.c` to be in place.
    3. HV_CONFIG_* series now encodes absolute paths.

v3:
 * Do not validate BOARD_FILE/SCENARIO_FILE if BOARD/SCENARIO are given.

v2:
 * `defconfig` now also generates the C configuration files.
 * BOARD/SCENARIO now accept either board/scenario names or XML file paths.
 * Adapt to the new allocation.xml & unified.xml.
 * Cleanup names of internal variables in config.mk for brevity.

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-01-20 17:58:00 +08:00
Junjie Mao 2f6abbe752 acrn-config: add XSLT scripts to transform XMLs to config.[h|mk]
In order to remove Kconfig from the build process, acrn-config shall
transform XML configuration files to config.h and config.mk by itself. This
patch adds XSLT scripts that do the trick.

Unfortunately, the scenario XML file along is not sufficient to generate
config.h and config.mk, though. In addition to resource
allocation (i.e. allocating physical RAM for the hypervisor), the
transformation also need to do the following:

    1. Translate UART info in board XML into several configuration entries
       depending on the UART selected in the scenario XML.
    2. Use the MAX_MSIX_TABLE_NUM value in the board XML if the scenario
       XML does not specify it.

In order to use XSLT to transform both XMLs in one shot, a template is
provided to create another XML that includes (using XInclude) both board
and scenario XMLs as sub-nodes. It will be instantiated once the
transformations are integrated in the following patch.

v2:
 * Add `allocation.xml` to `unified.xml` to include the results from static
   allocation.
 * Use HV_RAM_START and HV_RAM_SIZE in allocation results if they are not
   explicitly specified in the scenario XML.

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-01-20 17:58:00 +08:00
Junjie Mao 9cff2bbdc0 acrn-config: add a script to generate config sources from XMLs
In order for a unified interface for generating configuration sources from
board and scenario XMLs, this patch introduces a script named genconf.sh
which takes XML files as inputs and generate sources under the specified
directory. Once used in Makefiles, this script helps to minimize the
impacts on the Makefiles when we refine the configuration source generation
process in the future.

This patch also adds a non-zero return value to board_cfg_gen.py and
scenario_cfg_gen.py so that we do not need to inspect the logs to determine
if the generation succeeds.

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-01-20 17:58:00 +08:00
Tao Yuhong 6c6fa5f340 Fix: HV: keep reshuffling on VBARs
The commit 'Fix: HV: VM OS failed to assign new address to pci-vuart
BARs' need more reshuffle.

Tracked-On: #5491
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2021-01-15 15:00:01 +08:00
Jie Deng 5c5d272358 hv: remove bitmap_clear_lock of split-lock after completing emulation
When "signal_event" is called, "wait_event" will actually not block.
So it is ok to remove this line.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
2021-01-13 15:32:27 +08:00
Yin Fengwei ef411d4ac3 hv: ptirq: Shouldn't change sid if intx irq mapping was added
Now, we use hash table to maintain intx irq mapping by using
the key generated from sid. So once the entry is added,we can
not update source ide any more. Otherwise, we can't locate the
entry with the key generated from new source ide.

For source id change, remove_remapping/add_remapping is used
instead of update source id directly if entry was added already.

Tracked-On: #5640
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-01-12 15:23:44 +08:00
Jie Deng 8aebf5526f hv: move split-lock logic into dedicated file
This patch move the split-lock logic into dedicated file
to reduce LOC. This may make the logic more clear.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
2021-01-08 17:37:20 +08:00
Jie Deng 27d5711b62 hv: add a cache register for VMX_PROC_VM_EXEC_CONTROLS
This patch adds a cache register for VMX_PROC_VM_EXEC_CONTROLS
to avoid the frequent VMCS access.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
2021-01-08 17:37:20 +08:00
Jie Deng f291997811 hv: split-lock: using MTF instead of TF(#DB)
The TF is visible to guest which may be modified by
the guest, so it is not a safe method to emulate the
split-lock. While MTF is specifically designed for
single-stepping in x86/Intel hardware virtualization
VT-x technology which is invisible to the guest. Use MTF
to single step the VCPU during the emulation of split lock.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
2021-01-08 17:37:20 +08:00
Jie Deng 6852438e3a hv: Support concurrent split-lock emulation on SMP.
For a SMP guest, split-lock check may happen on
multiple vCPUs simultaneously. In this case, one
vCPU at most can be allowed running in the
split-lock emulation window. And if the vCPU is
doing the emulation, it should never be blocked
in the hypervisor, it should go back to the guest
to execute the lock instruction immediately and
trap back to the hypervisor with #DB to complete the
split-lock emulation.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
2021-01-08 17:37:20 +08:00
Li Fei1 0b18389d95 hv: vcpuid: expose mce feature to guest
Windows64 seems only support processor which has MCE (Machine Check Error)
feature.

Tracked-On: #5638
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2021-01-08 17:22:34 +08:00
Tao Yuhong 84752ab229 Fix: HV: VM OS failed to assign new address to pci-vuart BARs
When wrong BAR address is set for pci-vuart, OS may assign a
new BAR address to it. Pci-vuart BAR can't be reprogrammed,
for its wrong fixed value. That can may because pci_vbar.fixed and
pci_vbar.type has overlap in abstraction, pci_vbar.fixed
has a confusing name, pci_vbar.type has PCIBAR_MEM64HI which is not
really a type of pci BARs.
So replace pci_vbar.type with pci_vbar.is_mem64hi, and change
pci_vbar.fixed to an union type with new name pci_vbar.bar_type.

Tracked-On: #5491
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-01-08 17:20:56 +08:00
Jie Deng b14c32a110 hv: Retain RIP only for fault exception.
We have trapped the #DB for split-lock emulation.
Only fault exception need RIP being retained.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-12-31 11:12:33 +08:00
Jie Deng 977e862192 hv: Add split-lock emulation for xchg
xchg may also cause the #AC for split-lock check.
This patch adds this emulation.

 1. Kick other vcpus of the guest to stop execution
    if the guest has more than one vcpu.

 2. Emulate the xchg instruction.

 3. Notify other vcpus (if any) to restart execution.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-12-31 11:12:33 +08:00
Jie Deng 47e193a7bb hv: Add split-lock emulation for LOCK prefix instruction
This patch adds the split-lock emulation.
If a #AC is caused by instruction with LOCK prefix then
emulate it, otherwise, inject it back as it used to be.

 1. Kick other vcpus of the guest to stop execution
    and set the TF flag to have #DB if the guest has more
    than one vcpu.

 2. Skip over the LOCK prefix and resume the current
    vcpu back to guest for execution.

 3. Notify other vcpus to restart exception at the end
    of handling the #DB since we have completed
    the LOCK prefix instruction emulation.

Tracked-On: #5605
Signed-off-by: Jie Deng <jie.deng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-12-31 11:12:33 +08:00
Yonghua Huang 643bbcfe34 hv: check the availability of guest CR4 features
Check hardware support for all features in CR4,
 and hide bits from guest by vcpuid if they're not supported
 for guests OS.

Tracked-On: #5586
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-12-18 11:21:22 +08:00
Yonghua Huang 442fc30117 hv: refine virtualization flow for cr0 and cr4
- The current code to virtualize CR0/CR4 is not
   well designed, and hard to read.
   This patch reshuffle the logic to make it clear
   and classify those bits into PASSTHRU,
   TRAP_AND_PASSTHRU, TRAP_AND_EMULATE & reserved bits.

Tracked-On: #5586
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-12-18 11:21:22 +08:00
Yonghua Huang 08c42f91c9 hv: rename hypercall for hv-emulated device management
Coding style cleanup, use add/remove instead of create/destroy.

Tracked-On: #5586
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-12-07 16:25:17 +08:00
Shiqing Gao 6f10bd00bf hv: coding style clean-up related to Boolean
While following two styles are both correct, the 2nd one is simpler.
	bool is_level_triggered;
	1. if (is_level_triggered == true) {...}
	2. if (is_level_triggered) {...}

This patch cleans up the style in hypervisor.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2020-11-28 14:51:32 +08:00
Junming Liu 1cd932e568 hv: refine code style
refine code style

Tracked-On: #4020

Signed-off-by: Junming Liu <junming.liu@intel.com>
2020-11-26 12:56:28 +08:00
Junming Liu 56eb859ea4 hv: vmexit: refine xsetbv_vmexit_handler API
From SDM Vol.2C - XSETBV instruction description,
If CR4.OSXSAVE[bit 18] = 0,
execute "XSETBV" instruction will generate #UD exception.

From SDM Vol.3C 25.1.1,#UD exception has priority over VM exits,
So if vCPU execute "XSETBV" instruction when CR4.OSXSAVE[bit 18] = 0,
VM exits won't happen.

While hv inject #GP if vCPU execute "XSETBV" instruction
when CR4.OSXSAVE[bit 18] = 0.
It's a wrong behavior, this patch will fix the bug.

Tracked-On: #4020

Signed-off-by: Junming Liu <junming.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-11-26 12:56:28 +08:00
Yonghua Huang 62d51dff3d hv: fix nr_bars for hv-land ivshmem devices
Memory BAR of ivshmem device is 64-bit, 2 BAR registers
 are used, counting in one 32-bit MMIO bar and and one
 32-bit vMSIX table bar, number of bars "nr_bars" shall
 be 4 instead of 3.

Tracked-On: #5490
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-11-24 13:13:48 +08:00
Yonghua Huang 49a773ab54 hv: bugfix for hv-emulated device de-init
- fix bug in 'hcall_destroy_vdev()', the availability of
   vpci device shall be checked on 'target_vm".

 - refine 'vpci_update_one_vbar()' to avoid potential NULL
   pointer access.

Tracked-On: #5490
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-11-13 11:43:47 +08:00
Peter Fang 68dc8d9f8f hv: pm: avoid duplicate shutdowns on RTVM
It is possible for more than one vCPUs to trigger shutdown on an RTVM.
We need to avoid entering VM_READY_TO_POWEROFF state again after the
RTVM has been paused or shut down.

Also, make sure an RTVM enters VM_READY_TO_POWEROFF state before it can
be paused.

v1 -> v2:
- rename to poweroff_if_rt_vm for better clarity

Tracked-On: #5411
Signed-off-by: Peter Fang <peter.fang@intel.com>
2020-11-11 14:05:39 +08:00
Peter Fang 5a13237b1f hv: remove vm_lock in hcall_destroy_vm()
Hypercall handlers for post-launched VMs automatically grab the vm_lock
in dispatch_sos_hypercall(). Remove the use of vm_lock inside the
handler.

Tracked-On: #5411
Signed-off-by: Peter Fang <peter.fang@intel.com>
2020-11-06 15:11:15 +08:00
dongshen ca5683f78d hv: add support for shutdown for pre-launched VMs
Currently, ACRN only support shutdown when triple fault happens, because ACRN
doesn't present/emulate a virtual HW, i.e. port IO, to support shutdown. This
patch emulate a virtual shutdown component, and the vACPI method for guest OS
to use.

Pre-launched VM uses ACPI reduced HW mode, intercept the virtual sleep control/status
registers for pre-launched VMs shutdown

Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-11-04 10:33:31 +08:00
dongshen 8f79ceefbd hv: fix out-of-date comments related to pre-launched VMs rebooting
Like post-launched VMs, for pre-launched VMs, the ACPI reset register
is also fixed at 0xcf9 and the reset value is 0xE, so pre-launched VMs
now also use ACPI reset register for rebooting.

Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-11-04 10:33:31 +08:00
Peter Fang e5edc7c090 hv: console: switch back to HV shell on VM pause
A VM may transition to VM_PAUSED state while its console is being used.

Jump back to the HV shell if this happens so the console does not appear
stuck.

Tracked-On: #5411
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-11-04 10:33:31 +08:00
Peter Fang 70b1218952 hv: pm: support shutting down multiple VMs when pCPUs are shared
More than one VM may request shutdown on the same pCPU before
shutdown_vm_from_idle() is called in the idle thread when pCPUs are
shared among VMs.

Use a per-pCPU bitmap to store all the VMIDs requesting shutdown.

v1 -> v2:
- use vm_lock to avoid a race on shutdown

Tracked-On: #5411
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-11-04 10:33:31 +08:00
Li Fei1 c6f9404f55 hv: psram: add kconfig to enable psram
Add two Kconfig pSRAM config:
one for whether to enable the pSRAM on the platfrom or not;
another for if the pSRAM is enabled on the platform whether to enable
the pSRAM in the pre-launched RTVM.
If we enable the pSRAM on the platform, we should remove the pSRAM EPT
mapping from the SOS to prevent it could flush the pSRAM cache.

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-11-02 15:56:30 +08:00
Qian Wang 99ee76781f hv: pSRAM: add pSRAM support for pre-launched RTVM
1.Modified the virtual e820 table for pre-launched VM. We added a
segment for pSRAM, and thus lowmem RAM is split into two parts.
Logics are added to deal with the split.
2.Added EPT mapping of pSRAM segment for pre-launched RTVM if it
uses pSRAM.

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-11-02 15:56:30 +08:00
Qian Wang a557105e71 hv: ept: set EPT cache attribute to WB for pSRAM
pSRAM memory should be cachable. However, it's not a RAM or a normal MMIO,
so we can't use the an exist API to do the EPT mapping and set the EPT cache
attribute to WB for it. Now we assume that SOS must assign the PSRAM area as
a whole and as a separate memory region whose base address is PSRAM_BASE_HPA.
If the hpa of the EPT mapping region is equal to PSRAM_BASE_HPA, we think this
EPT mapping is for pSRAM, we change the EPT mapping cache attribute to WB.

And fix a minor bug when SOS trap out to emulate wbinvd when pSRAM is enabled.

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-11-02 15:56:30 +08:00