It is a common practice to parse PCI BDF in the static allocators. This
patch moves the BusDevFunc class (which is a named tuple encoding a BDF) to
lib.py and uses it for BDF parsing throughout the static allocators.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Customized environment variables are not inherited to child processes
created by the subprocess module. As a result the legacy board parser may
not be able to locate the prerequisite utilities if they can be found only
with the customized PATH.
This patch passes the PATH of cli.py to the legacy parser so that both
scripts use the same PATH to search for utilities.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
With a growing demand on host ACPI namespace for devices pass-through, it
is now important to parse the ACPI namespace when generating board
XMLs. This patch makes ACPI namespace parsing enabled by default by
replacing the `--advanced` option, which is designed to enable the parsing,
to `--basic` which disables it.
The option provides a reliable way to disable ACPI namespace parsing
completely in case the parsing blocks the generation of board XMLs, while
the ACPI namespace parser will gracefully stop without polluting the board
XML when it fails.
This patch is added in v2 of the patch series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch updates the board inspector to collect the bits of physical and
linear addresses of the processors and generate this information to the
board XML for further uses at configuration phase.
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is witnessed on some boards that the device status (as is reported by
the _STA object) returns 0 while the device object is still useful for
pass-through devices. The original implementation, however, assumes that
only a device is a non-zero status is useful as long as the _STA object
exists.
This patch makes this filtering disabled by default and adds a command-line
argument `--check-device-status` to enable this filtering. As disabled or
non-present devices can have empty resources, the sorting algorithm is
updated accordingly to gracefully handle such descriptors.
This patch is added in v3 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Occasionally buffer fields (which are typically integers) are converted to
hexadecimal strings for debugging purposes. This patch adds the conversion
to suppress interpretation errors of these debugging calls.
This patch is added in v3 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Servers typically have multiple peer host bridges that need to be scanned
separately. This patch extends the PCI information extractor to visit all
PCI host bridges by enumerating /sys/devices/pci* directories.
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While not allowed by ACPI specification, using a ConstObj (e.g. OneOp) as a
term in a TermList IS witnessed in the DSDT of some BIOS. This patch allows
ConstObj to act as a TermObj so that a TermList can contain a ConstObj as a
statement (which is essentially no-op).
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is seen that the BAR in the PCI configuration space of a device can be
cleared when the device is put to D3. This patch resumes a device not in D0
before parsing its configuration space in order to collect accurate
information.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
AML allows devices defined in an ACPI namespace to have inter-dependency,
i.e. a method defined in one device can refer to objects in other
devices. While such inter-dependency is common in device manipulation
methods, device identification and configuration methods, such as _CRS, may
depend on other devices as well.
An example we have already met is a PCS (Physical Coding Sublayer) which
calculates resource descriptors by accessing the PCI configuration space of
the accompanying Ethernet controller. Without the ACPI object describing
the PCS, a driver of the Ethernet controller may refuse to initialize.
This patch adds a preliminary dependency analyzer to detect such
inter-device dependency. The analyzer walks through the reference chains of
an object, identifying whether the referenced objects are operation fields
of a device. Depending on the result of this analysis, the board XML is
refined as follows.
* When an object (probably a method) references such fields, the original
object definition in host DSDT/SSDTs will be copied in the AML template
so that they still work in VMs where the operation fields may be
virtualized. Such objects will be referred to as "copied objects"
hereinafter.
* The objects that are **directly** referenced by a copied object is
added in the AML template as well. Such objects still belong to devices
where they are originally defined in the host ACPI namespace. Their
definition, however, may be copied or replaced with constant values,
depending on the dependency analysis on these objects.
* Nodes with the "dependency" tag are added under "device" nodes in the
board XML, allowing the configuration tools to follow the device
dependency chain when generating vACPI tables. These nodes only
represent direct dependencies; indirect dependencies can be inferred by
following those direct ones.
The current implementation does not allow objects being added to AML
templates if they refer to any of the following.
* Global objects, i.e. objects not belonging to any device. Such objects
tend to encode system-wide information, such as the ACPI
NVS (Non-Volatile Storage) or its fields.
* Methods with parameters.
Objects with such references are thus being hidden from guest software,
just like how they are invisible in the current implementation.
This patch is added in v2 of the series.
v2 -> v3:
* Also collect dependencies due to providing or consuming resources.
* Refactor the dependency detection logic for clarity.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
GPIO and generic serial connection resources in ACPI resource descriptors
usually encode resource sources which are important in detecting
cross-device dependencies. This patch adds parsers for GPIO and generic
serial connection descriptors.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds AML template (in XML hexBinary format) for each device to
board XMLs. For now these templates contain the following objects if they
exists in the physical DSDT:
- Device identification objects: _ADR, _HID, _UID and _STR
- _CRS which encodes the current resources consumed by the device
- _STA which encodes the status of the device
An AML template is always a DefScope with a single DefDevice so that they
can be appended anywhere in the vDSDT.
v1 -> v2:
* Remove the temporary visitor that collects cross-device dependencies. Such
check will be replaced with another visitor introduced in the next patch.
v2 -> v3:
* The AML templates are now DefDevice objects with their names being the
full namepath. The vDSDT generator will take care of this and organize
the objects properly.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Object type codes are used to identify, as the name suggests, type of
objects. Typical object types in AML include integers, strings, methods,
devices, buffers, packages and operation regions. In DefExternal terms the
object type codes help specify the type of the external objects so that an
AML parser can parse the code without knowing the concrete definition of
these objects.
The per-device AML templates in board XMLs need DefExternal terms to
declare the objects in other devices, as these templates are meant to be
parsed and integrated separately. This patch adds a static method to object
declaration classes to make it easier to generate such DefExternal terms
for a given declaration.
A complete definition of object type codes can be found in section 19.6.96
of ACPI specification 6.4.
v1 -> v2:
* Remove the object_type of FieldDecl and OperationFieldDecl as 0x5 is
not a proper object type for buffer fields.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the ConditionallyUnregisterSymbolVisitor
exits upon visiting a DefMethod node without unregistering that method. As
a result, methods in False branches in DSDT/SSDTs are not removed from the
parsed namespace, which can lead to further confusions when these methods
are referenced (e.g. a _CRS method visited by the board inspector).
This patch fixes this by always visiting a DefMethod node but stops
traversing its children.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
/usr/share/pci.ids.gz is another typical path to the pci.ids file of the
lspci tool which is used in Yocto-based systems. This patch adds this path
as another candidate when searching for pci.ids. The builtin gzip module is
used to open this file.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Address space resource descriptors have an optional field to encode the
resource source, which is not commonly used when creating new resource
descriptors.
For modules which want to create a class to parse address space resource
descriptors without resource source, this patch sets the length of such
descriptors as the default value of the `_len` factory parameter so that
callers do not need to care about these lengths.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
With AML templates for devices in the board XML, the parser now needs to be able
to parse a stream as an arbitrary object. This patch adds the `parse_tree`
method to the acpiparser.aml.parser module for this purpose.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In addition to the mandatory _HID (Hardware ID), the ACPI spec also defines
an optional _CID (Compatible ID) object for device identification.
This patch enhances the ACPI extractor by parsing the _CID objects of devices as
well.
Tracked-On: #6320
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is quite common to meet permissions errors when opening a specific
region of /dev/mem due to kernel configurations. This patch adds a bit more
logs on this for eaiser debugging.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds interrupt pin related information into the board XML,
including:
* The PCI routing table in ACPI DSDT/SSDT are parsed and generated into
the board XML as "interrupt_pin_routing" nodes.
* IRQs encoded in _CRS directly are represented as resources of type
"irq".
* Interrupt lines (i.e. INTx#) of PCI devices are represented as
resources of type "interrupt_pin". When the PCI routing table is
available, the corresponding interrupt line is identified and
represented as the "source" attribute of the resource node.
Due to the existence of vIOAPIC in ACRN VMs, the board inspector interprets
the \_PIC method with parameter 1 to inform the ACPI namespace that the
interrupt model should be in APIC mode.
v1 -> v2:
* Remove the msi_enable variable which is defined but never used.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the acpiparser.aml.builder module which provides methods to
construct AML trees from scratch in Python. Similar to how parsers and
binary generators are implemented, this module constructs most builder
methods from the AML grammar defined in the acpiparser.aml.grammar
module. AML objects whose grammar are not present in the grammar module
require special treatment and their builders are implemented
explicitly. The methods have the same name as the AML tree labels defined
in the grammar.
In addition, this module also provides the method `build_value` which
converts plain integers, strings or interpreter values (which are defined
in the datatypes module) to AML trees.
With the builders, the `interpret_method_call` method in the
ConcreteInterpreter is refined to build the (fake) MethodInvocation node
using the builders and handle the actual parameters as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Tree visitors usually have a fixed direction (either top-down or bottom-up)
and invoking a visitor with a wrong direction typically leads to unintended
behavior. However, the current implementation exposes both `visit_topdown`
and `visit_bottomup` methods to users, allowing callers to invoke the
visitors in an undesigned way. The same issue exists in the implementation
of transformers.
This patch refactors the base classes of visitors and transformers so that
they require an explicit direction from their sub-classes to
initialize. Callers of the visitors and transformers are now expected to
invoke the `visit` or `transform` methods without assuming the correct
direction of the visitor or transformer. The original `visit_topdown` or
`visit_bottomup` methods (or their transformer counterparts) are now
used to initialize the `visit` method and can be used by the subclasses in
case those subclasses visits the tree in a customized manner.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch introduces a visitor that converts an arbitrary AML tree to an
AML binary. Most nodes can be converted in a straightforward way by
following the defined grammar, but the following nodes require some
additional effort:
- NameStrings can be formatted as either a NameSeg (i.e. four upper case
characters), a DualNamePath, a MultiNamePath or a NullName.
- PkgLengths are recalculated according to the actual length of the
following object (in case they are changed dynamically after being
generated by the parser) and generated following the AML encoding of
such lengths.
The visitor works in a bottom-up manner, i.e. the children are visited and
converted to binary before the parent.
The whole trees parsed from DSDT/SSDTs are now also stored in the Context
for further reference.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
_STR is another device identification object defined in ACPI spec that
describes a device. This patch collects this string (when available) into
board XML as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the property `irqs` to the class SmallResourceitemIRQ so
that the list of IRQs encoded in this resource item can be retrieved
easily.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser to the PCI routing tables returned by _PRT objects
of platform devices. The parsed result is a list of PRTMappingPackage
instances, each of which is a named tuple with the following fields:
* address: a dword with higher 16 bits being the function number and
lower 16 bits all 1's.
* pin: a byte representing the mapped pin.
* source: either a DeviceDecl of the device that allocates the interrupt
line, or the byte 0.
* source_index:
- If `source` is a DeviceDecl, this is the index of the interrupt
source within that device.
- If `source` is 0, this is the interrupt line connected to the pin.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Local variables can be assigned with formal arguments in AML. As a result
when interpreting a DefReturn node, the interpreter shall unwrap multiple
layers of argument/local variable wrappings until a concrete value is
found. This patch implements this logic.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Resource template buffers always end with an end tag. Concatenation of two
resource buffers thus requires that the end tag of the first buffer is
stripped. This patch adds this logic to the interpretation of DefConcatRes
AML nodes.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The warning, info and debug logging levels are intended to be used in the
following way.
* Warnings are used when users are expected to be aware of a certain
failure.
* Info messages are used to track parsing process and major internal
errors for development.
* Debug messages are used to collect verbose debug logs.
To align the current usage of logs to the above guidelines, this patch
adjusts the logging level of the following messages:
* DSDT/SSDT interpretation failures are now warnings, not information
* Failures of parsing deferred AML blocks are now information, not debug
messages
The default log level when running `cli.py` is adjusted to WARNING as well,
as INFO is primarily used for development. A new command line option
`loglevel` is added to adjust the log level per user needs.
v2 -> v3:
* Make address collisions in ACPI namespace as an info rather than a
warning.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
A DualNamePath clause is a NamePath that only follows rootchar or
prefixpath. Thus, it is never necessary to check if a dot is necessary for
separating segments before a DualNamePath. This patch removes the code that
conduct that check.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is seen occasionally that a memory/port BAR of a PCI device is
programmed with the address 0 which is clearly invalid. This patch
gracefully handles this case by printing an error to warn the users that
this device cannot be passed through to any VM.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
According to section 19 of ACPI spec 6.4, the following clauses open name
scopes (in addition to the Scope clauses).
- Function
- Device
- Method
- Power Resource
- Thermal Zone
The current AML parser only opens a scope when parsing DefMethod and
DefDevice, however. This patch fixes the AML parsing by opening a scope on
visiting a DefPowerRes or DefThermalZone clause.
Note: Functions in ASL are equivalent to Methods at AML level.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ConditionallyUnregisterSymbolVisitor has the following two
issues.
1. The visitor will crash when a DefIfElse node is not fully parsed due
to failed deferred expansion.
2. Nested DefIfElse of disabled blocks are still checked and one of its
branch may still take effect.
This patch fixes those issues by checking the predicates of a DefIfElse
block only when conditionally_hidden is False and check existence of
TermList and DefElse clauses.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When parsing a sequence of clauses, it is not necessary to peek an opcode
from the current stream unless that sequence starts with one. Peeking an
opcode is even an error when the actual clause is empty (e.g. as a
TermList).
This patch makes the SequenceFactory only peeking at the next opcode when
the grammar expects one.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refines the AML parser to improve its readability and
performance in the following ways.
1. A Tree object now has the parts of the corresponding object being
member fields. As an example, a Tree with label `DefMethod` now has
members `NameString`, `MethodFlags` and `TermList`.
2. It is now possible to assign names each part of an object. The grammar
is updated to assign different names to the parts with the same type
in the same object.
3. Invocation to intermediate factories is now skipped. As an example,
when parsing a ByteConst that acts as a ByteIndex, the original
implementation invokes the following factories in sequence:
ByteIndex -> TermArg -> DataObject -> ComputationalData -> ByteConst
The factories TermArg, DataObject and ComputationalData does nothing
but forward the parsing to the next-level factory according to the
opcode of the next object. With this patch, the invocation sequence
becomes:
ByteIndex -> ByteConst
i.e. ByteIndex directly passes to ByteConst which can parse the next
opcode.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ACPI AML parser can generate incorrect AST if a DSDT/SSDT
satisfies the following:
1. The body of a method invokes a NameString that is defined later.
2. Before that method the same NameString is also defined but in an outer
scope and with a different number of parameter.
Since method bodies hardly define any further symbol that is referenced
outside the method itself, this patch forces the parsing of method bodies
to be deferred to the second pass when all symbols have been declared.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of I/O buffers have the following issues.
1. I/O buffers are filled with values on creation. This may be fine for
memory-mapped I/O regions, but could be a problem to port I/O regions
and indexed I/O regions.
2. While not commonly seen, it IS witnessed that some devices only allow
its MMIO registers to be accessed with certain width. Accessing such
registers with a larger width will not be handled by the device,
causing SW to get all 1's rather than the actual values in these
registers.
This patch resolves the issues above as follows:
1. I/O buffers now do not access any register on creation. Instead, the
register is accessed only upon requests.
2. The access width of these registers are followed to ensure that the
registers are accessed properly.
The classes that represents buffers when interpreting AML is also
refactored to abstract the common code that manages fields within
buffers. The class hierarchy now looks like this:
BufferBase: Implement methods that registers, reads or writes fields
Buffer(BufferBase): Implement memory buffer
StreamIOBuffer(BufferBase): Implement I/Os available via /dev files
IndexedIOBuffer(BufferBase): Implement I/Os via index/data registers
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
DefDevide is now enountered when interpreting host DSDT/SSDT. This patch
implements the interpretation of the integer division operation.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the AML interpreter continues interpreting a
method after meeting a DefReturn object, which is incorrect. This patch
fixes this issue by raising a dedicated exception on return and catching
that exception on the caller side.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Currently the HV console does not support PCI UART with 64bit BAR, but in the
case that the BAR is in 64bit and the BAR space is below 4GB (i.e. the high
32bit address of the 64bit BAR is zero), HV should be able to support it.
Tracked-On: #6334
Signed-off-by: Victor Sun <victor.sun@intel.com>
When guest kernel has multiple loading segments like ELF format image, just
define one load address in sw_kernel_info struct is meaningless.
The patch removes kernel_load_addr member in struct sw_kernel_info, the load
address should be parsed in each specified format image processing.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
The previous code did not load bzImage start from protected mode part, result
in the protected mode part un-align with kernel_alignment field and then cause
kernel decompression start from a later aligned address. In this case we had
to enlarge the needed size of bzImage kernel to kernel_init_size plus double
size of kernel_alignment.
With loading issue of bzImage protected mode part fixed, the kernel needed size
is corrected in this patch.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
When LaaG boots with bzImage module file, only protected mode code need
to be loaded to guest space since the VM will boot from protected mode
directly. Futhermore, per Linux boot protocol the protected mode code
better to be aligned with kernel_alignment field in zeropage, otherwise
kernel will take time to do "rep movs" to the aligned address.
In previous code, the bzImage is loaded to the address where aligned with
kernel_alignment, this would make the protected mode code unalign with
kernel_alignment. If the kernel is configured with CONFIG_RELOCATABLE=n,
the guest would not boot. This patch fixed this issue.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This patch moves get_bzimage_kernel_load_addr() from init_vm_sw_load() to
vm_sw_loader() stage so will set kernel load address of bzImage type kernel
in vm_bzimage_loader() in vm_load.c.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This patch moves get_initrd_load_addr() API from init_vm_sw_load() to
vm_sw_loader() stage. The patch assumes that the kernel image have been
loaded to guest space already.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
In load_sw_modules() implementation, we always assuming the guest kernel
module has one load address and then the whole kernel image would be loaded
to guest space from its load address. This is not true when guest kernel
has multiple load addresses like ELF format kernel image.
This patch removes load_sw_modules() API, and the loading method of each
format of kernel image could be specified in prepare_loading_xxximage() API.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
As the previous commit said the kernel load address should be moved
from init_vm_sw_load() to vm_sw_loader() stage. This patch refines
the API of get_bzimage_kernel_load_addr() in init_vm_kernel_info()
for later use.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Currently the guest kernel load address and ramdisk load address are
initialized during init_vm_sw_load() stage, this is meaningless when
guest kernel has multiple segments with different loading addresses.
In that case, the kernel load addresses should be parsed and loaded
in vm_sw_loader() stage, the ramdisk load address should be set in
that stage also because it is depended on kernel load address.
This patch refines the API of get_initrd_load_addr() which will set
proper initrd load address of bzImage type kernel for later use.
Tracked-On: #6323
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
According to PCIe Spec, for a RW register bits, If the optional feature
that is associated with the bits is not implemented, the bits are permitted
to be hardwired to 0b. However Zephyr would use INTx Line Register as writable
even this PCI device has no INTx, so emulate INTx Line Register as writable.
Tracked-On: #6330
Signed-off-by: Fei Li <fei1.li@intel.com>
Junjie Mao