Commit Graph

311 Commits

Author SHA1 Message Date
Minggui Cao 42d5533e6f HV: makefile: to avoid duplicated build libs
1. improve makefile to avoid duplicated build libs when make
in acrn-hypervisor/hypervisor directory to build HV only.

2. for debug/release library just select one makefile to build

Tracked-On: #2412
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2020-05-21 15:12:21 +08:00
Mingqiang Chi f994b5ffaf hv:cleanup vcpu state
-- remove VCPU_PAUSED and resume_vcpu
-- remove vcpu->prev_state in vcpu structure
-- rename pause_vcpu to zombie_vcpu

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-05-21 15:08:49 +08:00
Shuo A Liu 8287cfac6c hv: debug: reboot directly when issue 'reboot' shell cmd
Tracked-On: #4817
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-05-21 14:57:22 +08:00
Li Fei1 0c6b3e57d6 hv: ptdev: minor refine about ptirq_build_physical_msi
The virtual MSI information could be included in ptirq_remapping_info structrue,
there's no need to pass another input paramater for this puepose. So we could
remove the ptirq_msi_info input.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-05-06 11:51:11 +08:00
Mingqiang Chi 3df6d71e08 hv:print relocation delta
now the actual address does not match with the MAP file
if enable CONFIG_RELO when there are some exceptions,
this patch print the delta between the actual load addess
and CONFIG_HV_RAM_START.

Tracked-On: #4144
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-04-15 14:34:30 +08:00
Zide Chen eef3b51eda hv: move error message logging into gpa copy APIs
In this way, the code looks simpler and line of code is reduced.

Tracked-On: #3854
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-03-30 13:19:01 +08:00
Sainath Grandhi fe5a108c7b hv: vioapic init for SOS VM on platforms with multiple IO-APICs
For SOS VM, when the target platform has multiple IO-APICs, there
should be equal number of virtual IO-APICs.

This patch adds support for emulating multiple vIOAPICs per VM.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Sainath Grandhi f67ac09141 hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs
MADT is used to specify the GSI base for each IO-APIC and the number of
interrupt pins per IO-APIC is programmed into Max. Redir. Entry register of
that IO-APIC.

On platforms with multiple IO-APICs, there can be holes in the GSI space.
For example, on a platform with 2 IO-APICs, the following configuration has
a hole (from 24 to 31) in the GSI space.

IO-APIC 1: GSI base - 0, number of pins - 24
IO-APIC 2: GSI base - 32, number of pins - 8

This patch also adjusts the size for variables used to represent the total
number of IO-APICs on the system from uint16_t to uint8_t as the ACPI MADT
uses only 8-bits to indicate the unique IO-APIC IDs.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Sainath Grandhi 85217e362f hv: Introduce Global System Interrupt (GSI) into INTx Remapping
As ACRN prepares to support platforms with multiple IO-APICs,
GSI is a better way to represent physical and virtual INTx interrupt
source.
1) This patch replaces usage of "pin" with "gsi" whereever applicable
across the modules.
2) PIC pin to gsi is trickier and needs to consider the usage of
"Interrupt Source Override" structure in ACPI for the corresponding VM.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Mingqiang Chi 14692ef60c hv:Rename two VM states
Rename:
  VM_STARTED --> VM_RUNNING
  VM_POWERING_OFF --> VM_READY_TO_POWEROFF

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-03-13 10:34:29 +08:00
Li Fei1 4b6dd19ad1 hv: pci: rename CFG read/write function for PCI-compatible Configuration Mechanism
Move CFG read/write function for PCI-compatible Configuration Mechanism from
debug/uartuart16550.c to hw/pci.c and rename CFG read/write function for
PCI-compatible Configuration Mechanism to pci_pio_read/write_cfg to align with
CFG read/write function pci_mmcfg_read/write_cfg for PCI Express Enhanced
Configuration Access Mechanism.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-03-12 09:17:02 +08:00
Mingqiang Chi 790614e952 hv:rename several variables and api for ioapic
rename:
  ioapic_get_gsi_irq_addr --> gsi_to_ioapic_base
  ioapic_addr -->ioapic_base

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-03-11 13:26:15 +08:00
Sainath Grandhi 460e7ee5b1 hv: Variable/macro renaming for intr handling of PT devices using IO-APIC/PIC
1. Renames DEFINE_IOAPIC_SID with DEFINE_INTX_SID as the virtual source can
   be IOAPIC or PIC
2. Rename the src member of source_id.intx_id to ctlr to indicate interrupt
   controller
2. Changes the type of src member of source_id.intx_id from uint32_t to
   enum with INTX_CTLR_IOAPIC and INTX_CTLR_PIC

Tracked-On: #4447
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2020-03-06 11:29:02 +08:00
Victor Sun 708cae7c88 HV: remove DBG_LEVEL_PARSE
- It is meaningless to enable debug function in parse_hv_cmdline() because
the function run in very eary stage and uart has not been initialized at
that time, so remove this debug level definition;

- Rewrite parse_hv_cmdline() function to make it compliant with MISRA-C;

- Decouple uart16550 stuff from Init.c module and let console.c handle it;

Tracked-On: #4419

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-02-26 09:24:16 +08:00
Yonghua Huang 64b874ce4c hv: rename BOOT_CPU_ID to BSP_CPU_ID
1. Rename BOOT_CPU_ID to BSP_CPU_ID
  2. Repace hardcoded value with BSP_CPU_ID when
  ID of BSP is referenced.

Tracked-On: #4420
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-02-25 09:08:14 +08:00
Alexander Merritt 920f02706a acrn: rename param in uart16550_init
Tracked-On: #4390
Signed-off-by: Alexander Merritt <alex.merritt@intel.com>
2020-02-10 11:49:34 +08:00
Yonghua Huang fd4775d044 hv: rename VECTOR_XXX and XXX_IRQ Macros
1. Align the coding style for these MACROs
  2. Align the values of fixed VECTORs

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Yonghua Huang b90862921e hv: rename the ACRN_DBG_XXX
Refine this MACRO 'ACRN_DBG_XXX' to 'DBG_LEVEL_XXX'

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Shuo A Liu 3edde2608c hv: debug: show vcpu thread status in vcpu_list debug command
Due to vcpu and its thread are two different perspective modules, each
of them has its own status. Dump both states for better understanding
of system status.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-13 10:16:30 +08:00
Li Fei1 1e50ec8899 hv: pci: use ECAM to access PCIe Configuration Space
Use Enhanced Configuration Access Mechanism (MMIO) instead of PCI-compatible
Configuration Mechanism (IO port) to access  PCIe Configuration Space
PCI-compatible Configuration Mechanism (IO port) access is used for UART in
debug version.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-01-07 16:05:30 +08:00
Victor Sun ea3476d22d HV: rename CONFIG_MAX_PCPU_NUM to MAX_PCPU_NUM
rename the macro since MAX_PCPU_NUM could be parsed from board file and
it is not a configurable item anymore.

Tracked-On: #4230

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-12 13:49:28 +08:00
Conghui Chen d48da2af3a hv: bugfix for debug commands with smp_call
With cpu-sharing enabled, there are more than 1 vcpu on 1 pcpu, so the
smp_call handler should switch the vmcs to the target vcpu's vmcs. Then
get the info.

dump_vcpu_reg and dump_guest_mem should run on certain vmcs, otherwise,
there will be #GP error.

Renaming:
vcpu_dumpreg -> dump_vcpu_reg
switch_vmcs -> load_vmcs

Tracked-On: #4178
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-05 11:19:35 +08:00
Shuo A Liu 47139bd78c hv: print current sched_object in acrn logmsg
Add a header field in acrnlog message to indicate the current
running thread.

Tracked-On: #4178
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-05 11:19:35 +08:00
Mingqiang Chi bd0dbd274d hv:add dump_guest_mem
add shell command to support dump dump guest memory
e.g.
dump_guest_mem vm_id, gva, length

Tracked-On: #4144
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-26 10:58:19 +08:00
Mingqiang Chi 215bb6ca6c hv:refine dump_host_mem
rename shell_dumpmem to shell_dump_host_mem
and refine this api.

Tracked-On: #4144
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-26 10:58:19 +08:00
Mingqiang Chi 4c8dde1b9c hv:remove show_guest_call_trace
now this api assumes the guest OS is 64 bits,
this patch remove this api and will replace it
with dumping guest memory.

Tracked-On: #4144
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-26 10:58:19 +08:00
Sainath Grandhi 22a1bd6948 hv: Fix the definition of struct representing interrupt hw frame
In 64-bit mode, processor pushes SS and RSP onto stack unconditionally.
Also when dumping the exception info, it makes more sense to dump
the RSP at the point of interrupt, rather than the RSP after pushing
context (including GPRs)

Tracked-On: #4102
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-13 16:06:35 +08:00
Yonghua Huang 0eb427f122 hv:refine 'uint64_t' string print format in comm moudle
Use "0x%lx" string to format 'uint64_t' type value,
  instead of "0x%llx".

Tracked-On: #4020
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2019-11-09 11:42:38 +08:00
Yonghua Huang fb29d1f99f hv: refine 'uint64_t' string print format in debug moudle
Use "0x%lx" string to format 'uint64_t' type value,
  instead of "0x%llx".

Tracked-On: #4020
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2019-11-09 11:42:38 +08:00
Shuo A Liu 7e66c0d4fa hv: sched: use get_running_vcpu to replace per_cpu vcpu with cpu sharing
With cpu sharing enabled, per_cpu vcpu cannot work properly as we might
has multiple vcpus running on one pcpu.
Add a schedule API sched_get_current to get current thread_object on
specific pcpu, also add a vcpu API get_running_vcpu to get corresponding
vcpu of the thread_object.

Tracked-On: #3813
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-23 12:47:08 +08:00
Shuo A Liu 891e46453d hv: sched: move pcpu_id from acrn_vcpu to thread_object
With cpu sharing enabled, we will map acrn_vcpu to thread_object
in scheduling. From modulization perspective, we'd better hide the
pcpu_id in acrn_vcpu and move it to thread_object.

Tracked-On: #3813
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-23 12:47:08 +08:00
Shiqing Gao 658fff27b4 hv: pci: update "union pci_bdf"
- add one more filed in "union pci_bdf"
- remove following interfaces:
  * pci_bus
  * pci_slot
  * pci_func
  * pci_devfn

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-09-25 13:45:39 +08:00
Mingqiang Chi 5a03a5df05 hv:fix MISRA-C violation for variable-length array
C99 supports variable-length array,
but misra-c required "variable-length array types shall not be used"

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-09-24 09:02:05 +08:00
Mingqiang Chi c36908dce2 hv:remove redundant memset in some cases
No need to memset since it will overwrite the memory
by copy_from_gpa in some cases.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-09-24 09:02:05 +08:00
Manisha 76f104cf3d SEP/SOCWATCH: fix misra violation
Tracked-On: #3598
Signed-off-by: Manisha <manisha.chinthapally@intel.com>
2019-09-16 15:54:34 +08:00
Manisha 489a0e645d SEP/SOCWATCH change variable names
To follow ACRN coding guideline: identifier cannot be reused.
in profiling_info_wrapper struct, modified member names:
pmu_sample -> p_sample
sep_state -> s_state
sw_msr_op_info -> sw_msr_info
vm_switch_trace -> vm_trace

Tracked-On: #3598
Acked-by: min.yeol.lim@intel.com
Signed-off-by: Manisha <manisha.chinthapally@intel.com>
2019-09-16 15:54:34 +08:00
Yifan Luo f65ba2154f HV: shell: fix temp_str out of bounds buffer access
String buffer temp_str is defined with size TEMP_STR_SIZE(60U) but accessed with MAX_STR_SIZE(256U). Better to limit the access bound to TEMP_STR_SIZE to prevent potential issue.

Tracked-On: #3549
Signed-off-by: Yifan Luo <luoyifan@cmss.chinamobile.com>
2019-08-09 10:26:38 +08:00
Li, Fei1 11cf9a4a8a hv: mmu: add hpa2hva_early API for earlt boot
When need hpa and hva translation before init_paging, we need hpa2hva_early and
hva2hpa_early since init_paging may modify hva2hpa to not be identical mapping.

Tracked-On: #2987
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-07-26 09:10:06 +08:00
Li, Fei1 cc47dbe769 hv: uart: enable early boot uart
Enable uart as early as possible to make things easier for debugging.
After this we could use printf to output information to the uart. As for
pr_xxx APIs, they start to work when init_logmsg is called.

Tracked-On: #2987
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-07-26 09:10:06 +08:00
Li, Fei1 18ecdc123a hv: uart: make uart base address more readable
Now if the uart is mapped to a PIO address space, the uart base address is a physical
PIO address; if it's mapped to a MMIO address space, the uart base address is a
virtual MMIO address. Add union uart_addr structure to imply this.
And define a console_uart structure to add all uart related fields into this structure.

Tracked-On: #2987
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-07-24 16:11:38 +08:00
Huihuang Shi 2ec1694901 HV: fix sbuf "Casting operation to a pointer"
ACRN Coding guidelines requires two different types pointer can't
convert to each other, except void *.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-11 13:57:21 +08:00
Huihuang Shi 714162fb8b HV: fix violations touched type conversion
ACRN Coding guidelines requires type conversion shall be explicity.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-11 09:16:09 +08:00
Mingqiang Chi e4d1c321ad hv:fix "no prototype for non-static function"
change some APIs to static or include header file

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-07-09 10:36:03 +08:00
Conghui Chen 4d88b2bb65 hv: bugfix for sbuf reset
The sbuf is allocated for each pcpu by hypercall from SOS. Before launch
Guest OS, the script will offline cpus, which will trigger vcpu reset and
then reset sbuf pointer. But sbuf only initiate once by SOS, so these
cpus for Guest OS has no sbuf to use. Thus, when run 'acrntrace' on SOS,
there is no trace data for Guest OS.
To fix the issue, only reset the sbuf for SOS.

Tracked-On: #3335
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2019-06-27 15:40:19 +08:00
Mingqiang Chi 7e6ff2a176 hv:fix a bug for building debug/release lib
there is a build error if we only build debug/release library
because missing the build/modules folder

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>

	modified:   Makefile
	modified:   debug/Makefile
	modified:   release/Makefile
2019-06-26 15:22:57 +08:00
Kaige Fu c82e3fd264 HV: Debug: Add version command
When debugging the HV, we may want to check the HV version information
frequently. In current HV shell command, there is no such kind of command
to check this information. We can only scroll up the HV console log to
get the information. If there are very huge amount of lines of log, it
will be very time-wasting to get the HV version information.

So, this patch adds 'version' command to get the HV version information
conveniently.

Tracked-On: #3310
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-06-24 18:52:18 +08:00
Huihuang Shi e3ee9cf20e HV: fix expression is not boolean
MISRA-C standard requires the type of result of expression in if/while pattern shall be boolean.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2019-06-21 09:04:44 +08:00
yliu79 fe4fcf491f xHV: remove unused function is_dbg_uart_enabled
Change-Id: I64b3e08818f1cb15ec7c41557900d6e462c4e107
Tracked-On: #3123
Signed-off-by: yliu79 <ying2.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-22 16:36:03 +08:00
yliu79 36568ff5ea HV: remove unused function sbuf_is_empty and sbuf_get
Change-Id: I5fc3c472d445fc7a60c65e87cef692471ce6a26a
Tracked-On: #3123
Signed-off-by: yliu79 <ying2.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-22 16:36:03 +08:00
Yin Fengwei 8626e5aa3a vm_state: Update vm state VM_STATE_INVALID to VM_POWERED_OFF
Replace the vm state VM_STATE_INVALID to VM_POWERED_OFF.
Also replace is_valid_vm() with is_poweroff_vm().
Add API is_created_vm() to identify VM created state.

Tracked-On: #3082
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2019-05-08 16:58:41 +08:00