Commit Graph

66 Commits

Author SHA1 Message Date
dongshen 208b1d3664 HV: add uint32_t nr_bars to struct struct pci_pdev to track # of bars
nr_bars in struct pci_pdev is used to store the actual # of bars (
6 for normal pci device and 2 for pci bridge), nr_bars will be used in subsequent
patches

Use uint32_t for bar related variables (bar index, etc) to unify the bar
related code (no casting between uint32_t and uint8_t)

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-27 15:35:16 +08:00
dongshen 95d10d8921 HV: add union pci_bar and is_64bit_high to struct pci_bar
union pci_bar uses bit fields and follows the PCI bar spec definition to define the
bar flags portion and base address, this is to keep the same hardware format for vbar
register. The base/type of union pci_bar are still kept to minimize code changes
in one patch, they will be removed in subsequent patches.

define pci_pdev_get_bar_base() function to extract bar base address given a 32-bit raw
bar value

define a utility function pci_get_bar_type() to extract bar types
from raw bar value to simply code, as this function will be used in multiple
places later on: this function can be called on reg->value stored in struct
pci_bar to derive bar type.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-06-27 15:35:16 +08:00
dongshen 3e3be6ba50 HV: for PCI cardbus device, its capability offset is at offset 0x14
Add get_offset_of_caplist() function to return capability offset based on header type:
For normal pci device and bridge, its capability offset is at offset 0x34
For cardbus, its capability offset is at offset 0x14

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-06-27 15:35:16 +08:00
dongshen c61ea3b5af HV: remove unused function find_pci_pdev
find_pci_pdev is not used any more, remove it.

Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-27 15:35:16 +08:00
dongshen a6503c6af3 HV: remove function pci_pdev_foreach()
And make other related changes accordingly:
 Remove pci_pdev_enumeration_cb define
 Create init_vdevs() to iterate through the pdev list and create vdev for each pdev
 Export num_pci_pdev and pci_pdev_array as globals in header file

Minor cosmetic fix:
 Remove trailing whitespace

Tracked-On: #3022
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-05-23 14:06:51 +08:00
Mingqiang Chi b68aee6ef1 hv:remove common header files
remove hypervisor.h/hv_debug.h/hv_arch.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>

deleted:    include/arch/x86/hv_arch.h
deleted:    include/hv_debug.h
deleted:    include/hypervisor.h
2019-05-07 09:10:13 +08:00
Viktor Sjölind 5f51e4a762 pci.c: assert MSIX table count <= config max
Assert that PCI devices discovered while booting the hypervisor do not
have more table entries than allowed by the compile-time configuration
(CONFIG_MAX_MSIX_TABLE_NUM).

The case were `msix.table_count` > `CONFIG_MAX_MSIX_TABLE_NUM` is fatal
since the init function in the handler for MSI-X (vmsix_init) only looks
at `table_count` when populating the table. Since
`CONFIG_MAX_MSIX_TABLE_NUM` is the max size of the table array entry in
the pci_msix struct. This will cause the msix handler to write outside of
the table array.

Tracked-On: #2624
Signed-off-by: Viktor Sjölind <vsjolind@luxoft.com>
2019-03-08 23:04:12 +08:00
Mingqiang Chi 511d4c158b hv:cleanup console.h
--move several uart API declarations from console.h to uart16550.h
 --move several shell API declarations from console.h to shell.h
 --add dbg_cmd.h, move 'handle_dbg_cmd' declaration from console.h
   to dbg_cmd.h
 --move debug/uart16550.h to include/debug/uart16550.h since some
   uart APIs will be called by external files

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   bsp/uefi/cmdline.c
	modified:   debug/console.c
	modified:   debug/dbg_cmd.c
	modified:   debug/uart16550.c
	modified:   debug/vuart.c
	modified:   hw/pci.c
	modified:   include/arch/x86/multiboot.h
	modified:   include/debug/console.h
	new file:   include/debug/dbg_cmd.h
	new file:   include/debug/shell.h
	renamed:    debug/uart16550.h -> include/debug/uart16550.h
2019-02-27 11:12:48 +08:00
dongshen 4d11985366 HV: define function bdf_is_equal() to compare bdf
Use a function to compare bdf instead and some related code cleanup

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
dongshen 1454dd371d HV: this patch fixes bar address non-zero checking for 64-bit bars
For 64-bit bars, previously the code will do bar size calculation only if the
lower 32-bit bar address is nonzero, changed to do bar size calculation when the whole
64-bit bar address is nonzero.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
Victor Sun f082176df0 HV: init ptdev bar during runtime for partition mode
Current pt devices bar info for partion mode is hardcoded in
vm_description.c, now we remove the hardcoded info and parse the bar
info during pt devices init.

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen 983b717a61 HV: use the cached pci device info for sharing mode
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen e0f9d14011 HV: scan all physical PCI devices and store all needed info in array
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Zide Chen 12211fb67b hv: fix MISRA-C violations in dm/vpci
120D: Pointer param should be declared pointer to const.
  Add 'const' qualifier to function parameters whenever it's possible:
    alloc_pci_vdev()
    enumerate_pci_dev()
    pci_scan_bus()
    pci_enumeration_cb()
    partition_mode_vpci_init()
    partition_mode_vpci_deinit()
    sharing_mode_vpci_init()
    sharing_mode_vpci_deinit()
    vpci_cleanup()

45D: Pointer not checked for null before use.
  Check pointer vm in vpci_reset_ptdev_intr_info() before using it.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-11 14:28:45 +08:00
Shiqing Gao 2c6b43070b hv: code clean-up in `hw/pci.c`
* move `pci_pdev_calc_address` out of the spinlock in
   `pci_pdev_read_cfg`
 * remove the spaces before tabs
 * make the line not over 120 characters

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:45:52 +08:00
Shiqing Gao 2756ec740d hv: move `dm/hw/pci.c` to `hw/pci.c`
This patch moves `dm/hw/pci.c` to `hw/pci.c`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:45:52 +08:00