Commit Graph

475 Commits

Author SHA1 Message Date
Tao Yuhong 55b7fae67a HV: pci-vuart: pci based vuart emulation
Add emulation for pci based vuart device mcs9900 at hv land.
add struct pci_vdev_ops vuart_pci_ops, the vdev callbalks for vuart.

How to use
In misc/vm_configs/scenarios/<SCENARIO>/<BOARD>/pci_dev.c, add pci
vuart config to vm_pci_devs[] array. For example:

struct acrn_vm_pci_dev_config vm0_pci_devs[] = {
       /* console vuart setting*/
       {
               .emu_type = PCI_DEV_TYPE_HVEMUL,
               .vbdf.bits = {.b = 0x00U, .d = 0x04U, .f = 0x00U},
               .vdev_ops = &vmcs_ops,
               .vbar_base[0] = 0x80001000,	/* mmio bar */
               .vbar_base[1] = 0x80002000,	/* msix bar */
               .vuart_idx = 0,
       },
       /* communication vuart setting */
       {
               .emu_type = PCI_DEV_TYPE_HVEMUL,
               .vbdf.bits = {.b = 0x00U, .d = 0x05U, .f = 0x00U},
               .vdev_ops = &vmcs_ops,
               .vbar_base[0] = 0x80003000,
               .vbar_base[1] = 0x80004000,
               .vuart_idx = 1,
               .t_vuart.vm_id = 1U,
               .t_vuart.vuart_id = 1U,
       },
}

Tracked-On: #5394
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-10-30 20:41:34 +08:00
Yang,Yu-chu 8e545734d4 acrn-config: fix the bug of resolved nested mmio address
Multiple devices could be nested under the same range. Skip remove if
the device is removed already

Tracked-On: #5437
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:40:16 +08:00
Liang Yi 5646b218ff acrn-config: minor change scenario xml for cfl-k700-i7
Changes:
	1. assign 3 CPUs for WaaG on hybrid_rt scenario;
	2. Passthrough NVME@9:0.0 for VM0 on hybrid_rt scenario;
	3. Change rootfs from partition2 to partition3;

Tracked-On: #5390

Signed-off-by: Liang Yi <yi.liang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-30 20:38:43 +08:00
Yang,Yu-chu 7f80314406 acrn-config: find unused vbar base from start to end
- find unused vbar base from start of the memory address

Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
2020-10-30 20:24:28 +08:00
Yang,Yu-chu 6fa5e10e93 acrn-config: fix the shmem vbar2 with prefechtable bit
BAR2 is sharing memory bar:
- set bit[3] Prefetchable
- bit [2:1] to 10b

Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
2020-10-30 20:24:28 +08:00
Yang,Yu-chu c2f1d65ace acrn-config: add vbar[1] to SOS and pre-launched VM
Add vbar base region 1 for SOS and pre-launched VM ivshmem

Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
2020-10-30 20:24:28 +08:00
Yang,Yu-chu 2290396ef5 acrn-config: generate SOS ivshmem device information
Support enable ivshmem for SOS. Insert the ivshmem device information if
it is enabled.
1. get ivshmem vbar based:
  - vbar[0] is size 0x100
  - vbar[2] is specified MB size
2. get vbdf for ivshmem device

Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
2020-10-30 20:24:28 +08:00
Yang, Yu-chu 0f16746c1e acrn-config: add sos pci_dev_num and pci_devs to vm_configurations.c
Add following to default output scenarios vm_configurations.c:
 - pci_dev_num
 - pci_devs = sos_pci_devs

Both was defineded in CONFIG_SOS_VM.

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Yang, Yu-chu 57ed333027 acrn-config: fix logical of vm total pci devices count
Skip vhostbridge if there is no pci passtrhough device

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Yang, Yu-chu 8c78590da7 acrn-config: refactor pci_dev_c.py and insert vuart device information
- Refactor pci_dev_c.py to insert devices information per VMs
- Add function to get unused vbdf form bus:dev.func 00:00.0 to 00:1F.7

Add pci devices variables to vm_configurations.c
- To pass the pci vuart information form tool, add pci_dev_num and
pci_devs initialization by tool
- Change CONFIG_SOS_VM in hypervisor/include/arch/x86/vm_config.h to
compromise vm_configurations.c

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Yang, Yu-chu fc5add8dd6 acrn-config: add functions to get pci count per vm
Function to get pci dev number per VM

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Yang,Yu-chu bda53a3599 acrn-config: Add functionality to find unused vbar base
Allocate unused vbar for SOS and pre-launched VMs.

- For SOS, find unused vbar in the range which is assigned to pci host
bridge. The allocated vbar cannot have confilicts with any existing pci devices
- For pre-launched VMs, find unused vbar in the range 0x80000000 to
0xfffffff. The alloacted vbar cannot have confilicts with any
passthrough devices and mmio.

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Shuang Zheng b23374ccc9 acrn-config: get PTCT table from native environment
automatically get PTCT table from native environment for the usage
of pre-launched VMs.

Tracked-On: #5418

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:39:59 +08:00
Shuang Zheng 0e9775f4a4 acrn-config: integrate PTCT table for pre-launched RTVM
fill physical PTCT table into pre-launched vACPI table when PSRAM
is configured to passthrough to pre-launched RTVM.

Tracked-On: #5418

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:39:59 +08:00
Shuang Zheng faeef67c20 acrn-config: add PSRAM config in scenario setting
add CONFIG_PSRAM_ENABLED and CONFIG_PSRAM_PRE_RT_ENABLED config in
scenario setting and update Kconfig.

Tracked-On: #5418

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:39:59 +08:00
Shuang Zheng 6df069f6ba acrn-config: add PSRAM config in xmls
add PSRAM configs in xmls, only enable PSRAM and passthrough to
pre-launched RTVM for hybrid_rt scenario on tgl-rvp board.

Tracked-On: #5418

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:39:59 +08:00
Shuang Zheng c348cad1ee acrn-config: add mutually exclusive logic for legacy vuart and PCI vuart on config UI
Config tool UI will do mutually exclusive check the legacy vuart 0/1 and
PCI vuart 0/1 to make sure there is no legacy vuart and PCI vuart are
used at the same time for VMs.

Tracked-On: #5394

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:25:57 +08:00
Shuang Zheng 4f5885c271 acrn-config: add PCI VUART config in launch config UI
Add PCI VUART config for post-launched VMs in launch config UI. Users
can configure the console_vuart, configure or dynamically add or remove
communication_vuart based on the communication vuarts which are configured
from the scenario xml.

Tracked-On: #5394

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:25:57 +08:00
Shuang Zheng 788f28035d acrn-config: add PCI VUART config in scenario config UI
Add PCI VUART dynamic config for VMs in scenario config UI, keep legacy
VUART config. PCI vuart base can be set to INVALID_PCI_BASE and PCI_VUART;
users will configure the target_vm_id and target_vuart_id when PCI vuart
base is set to PCI_VUART; users can dynamically add or delete PCI vuart
for VMs.

Tracked-On: #5394

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-30 18:25:57 +08:00
Victor Sun a4cca45bc6 acrn-config: minor change scenario xml for ehl
changes:
	1. Change SOS VM rootfs to nvme0;
	2. Change hybrid_rt scenario VM0 mem size to 1GB;

Tracked-On: #5238

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-29 13:37:03 +08:00
Peter Fang 654d0f9d00 misc: life_mngr: use the entire read buffer for the SOS socket
The messages from the SOS socket can be safely read into the entire read
buffer.

Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-10-29 10:11:25 +08:00
Zide Chen a776ccca94 hv: don't need to save boot context
- Since de-privilege boot is removed, we no longer need to save boot
  context in boot time.
- cpu_primary_start_64 is not an entry for ACRN hypervisor any more,
  and can be removed.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2020-10-29 10:05:05 +08:00
Shuang Zheng 2309cadc9a acrn-config: passthrough embeded tsn device for pre-launched RTVM
passthrough embeded tsn device for pre-launched RTVM on hybrid-rt
scenario of tgl-rvp board.

Tracked-On: #5427

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-29 09:47:21 +08:00
Shuang Zheng 5229c576d3 acrn-config: update tgl board xml with tsn IFWI
update tgl-rvp.xml for tgl boards with IFWI of tsn version to enable
the embeded tsn device.

Tracked-On: #5427

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-10-29 09:47:21 +08:00
Yang, Yu-chu d743aa9b42 acrn-config: Get vbar base and index for vmsix supported devices
Add functionality to get free vbar base for the vmsix devices.

- The devices size is 4k.
- The mmio range for non SOS VM is 2G to 4G
- The mmio range for SOS is depended on the range which is assigned to
PCI bus hostbridge
- The next vbar index is based on last device vbar index vbar_i

Tracked-On: #5422
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-29 09:45:30 +08:00
Zide Chen 802065cf2f acrn-config: remove UEFI_OS_LOADER_NAME from all configurations
Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 75c9dbb46d acrn-config: remove CONFIG_UEFI_OS_LOADER_NAME from python scripts
Since UEFI boot is no longer supported.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Zide Chen 472534e922 efi-stub: remove efi-stub
UEFI boot is no longer supported in ACRN.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Shuang Zheng abcfc1c0a0 acrn-config: update vm configurations for hybrid_rt
update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL
boards, add 1 YaaG and assign 1 more pcpu for WaaG.

Tracked-On: #5390

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 14:00:45 +08:00
Shuang Zheng 3a764101a8 acrn-config: assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt
assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt scenario for
WHL/EHL/TGL/CFL boards.

Tracked-On: #5390

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 14:00:45 +08:00
dongshen 29cbce07f6 acrn-config: fix hang issue for board EHL (hybrid_rt)
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.

Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-10-14 13:56:44 +08:00
Shuang Zheng b64d23407b acrn-config: increase hv ram size for 7 VMs
increase hv ram size for 7 VMs to avoid ram overflowed.

Tracked-On: #5389

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:36:24 +08:00
Victor Sun 86e37fbe01 HV: add config code for cfl-k700-i7 board
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.

Tracked-On: #5212

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:25:09 +08:00
Victor Sun 1a29d5c371 acrn-config: add cfl-k700-i7 hybrid_rt xmls
Add cfl-k700-i7 hybrid_rt xml to support ACRN hybrid_rt scenario on
cfl-k700-i7 board.

Tracked-On: #5212

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:25:09 +08:00
Shixiong Zhang 0c75ee956c acrn-config: Add Px / Cx state info for tgl-rvp
the CX_INFO and PX_INFO in tgl board xml is empty,
added it.

Tracked-On: #5338

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 10:42:24 +08:00
Shixiong Zhang f258074c6c acrn-config: Provide post launch xml for hybrid scenario
There is no default xml for hybrid_rt to to generate the
script of posted launch WaaG.

Tracked-On: #5336

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 09:28:05 +08:00
Shixiong Zhang 4d65064fd6 acrn-config: modify the get_scenario_uuid function to use the right vmid
Fail to launch waag by the script generated by launch config on
hybrid_rt scenario, the get_scenario_uuid function should use the
vmid instad of the uosid to get the correct uuid.

Tracked-On: #5336

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-10-13 09:28:05 +08:00
David B. Kinder dd0fe54141 doc: Spelling and grammar tweaks
Did a partial run of ACRN documents through Acrolinx to catch additional
spelling and grammar fixes missed during regular reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2020-09-26 08:50:49 -07:00
Shuang Zheng 253fb86e0e acrn-config: update config xmls to make ivshmem size in decimal MB
update config xmls to make ivshmem size in decimal MB at description
and values.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-24 18:38:51 +08:00
Shuang Zheng 9e39dac665 acrn-config: make ivshmem size configured in decimal and MB
make ivshmem size configured in decimal and MB in config tool
UI and XMLs to simplify input from users.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-24 18:38:51 +08:00
Shuang Zheng 0bf8b72899 acrn-config: add the TSN device passthrough to pre-launched VM on TGL
add the TSN device in tgl-rvp board XML and configure it to
passthrough to pre-launched VM for hybrid_rt scenario on tgl-rvp.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-22 15:01:03 +08:00
Shuang Zheng f838dbaaf9 acrn-config: move source code of IVSHMEM region name to ivshmem_cfg.h
move MACRO of IVSHMEM region name to ivshmem_cfg.h and bug fix that
avoids multiple declarations of mem_regions in ivshmem_cfg.h

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-22 09:28:24 +08:00
Shuang Zheng 4617762419 acrn-config: move the MACRO of IVSHMEM shared region name to ivshmem_cfg.h
The MACRO of IVSHMEM shared region name is relevant to scenario, move
the MACRO from pci_devices.h which should be consistent for different
scenarios to ivshmem_cfg.h which is the configuration for IVSHMEM and
could vary in sceanrios.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-22 09:28:24 +08:00
Yuan Liu 38e2903770 hv: move mem_regions to ivshmem.c
This is a bug fix that avoids multiple declarations of mem_regions

Tracked-On: #4853

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-22 09:28:24 +08:00
Shixiong Zhang fdbdf1aa5f acrn-config: fix the issue of generating the vuart with incorrect name
When generate the launch scripts, the pm_by_vuart setting of pm_notify_channel
in launch setting should be according to the config of SOS vuart1.

Tracked-On: #5154

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-16 11:12:05 +08:00
Shixiong Zhang 0660ab5a7b acrn-config: make the get available ttysn function shareable
Move the function which are used to get available ttysn
from board catalogue to library catalogue

Tracked-On: #5154

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-16 11:12:05 +08:00
dongshen e8b25bbbdb acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario

Upload configuration source code for:
Board               scenarios
whl-ipc-i5          industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7          industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b           industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb           industry, hybrid, logical_partition

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00
dongshen f8056871ad acrn-config: add comments to the generated misc_cfg.h code
Comments will be added for the HV_SUPPORTED_MAX_CLOS/MAX_MBA_CLOS_NUM_ENTRIES/MAX_CACHE_CLOS_NUM_ENTRIES
macros in generated code

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00
dongshen ef9a961523 acrn-config/hv: create new file pt_intx_c.py to generate the pt_intx.c file
Move struct pt_intx_config vm0_pt_intx[] defintion to pt_intx.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00
dongshen 0f0d0c0d18 acrn-config: always generate P2SB_BAR_ADDR related boilerplate code in vm_configurations.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

The boilerplate code is protected by #ifdef P2SB_BAR_ADDR/#endif, so it will
not hurt if we always produce related code.

Define new macros P2SB_BAR_ADDR_GPA and P2SB_BAR_SIZE to make the code more flexible.

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00