This temporary release is based on the following commit:
commit 83b4731bab0423e3f9ffccfb37a882090be2f44a
Author: Tao Yuhong <yuhong.tao@intel.com>
Date: Wed Apr 14 07:43:11 2021 -0400
Change 64-bit MMIO BAR window to 256G-512G
DM maps 64-bit mmio BARs of vdev into 4G-5G, for post-launched VMs. At native
platform, 64-bit MMIO BARs which have 39-bit address, are always mapped into
256G-512G address space.
DM will change the address window of 64-bit vdev BARs of post-launched VMs to
256G-512G. That ask OVMF to do the same change, to boot from passthrough SATA/MVME
disks, which have 64-bit MMIO BAR.
Tracked-On: #5913
Signed-off-by: Peter Fang <peter.fang@intel.com>
- Explicitly reserve memory regions based on the input E820 map
- Revert "ovmf: reserve e820 table for PTCM"
Tracked-On: #5442
Signed-off-by: Peter Fang <peter.fang@intel.com>
- Add Platform GOP Policy
- Add MemoryFence to AcrnEmuVariableFvbRuntimeDxe
- UefiCpuPkg/CpuExceptionHandlerLib: Fix split lock
- OvmfPkg/SataControllerDxe: Calculate ChannelCount based on PI value
Tracked-On: #4866
Signed-off-by: Peter Fang <peter.fang@intel.com>
- GvtGopDxe: Fix crash if failed to get a valid mode
- GvtGopDxe: Enable GOP with parameters from vgt interface
- OvmfPkg/GvtGopDxe: Add GvtGopDxe skeleton driver
- Add back NVME support
- Update Readme.md
Tracked-On: #3700
Signed-off-by: Peter Fang <peter.fang@intel.com>
- Add support for VRING_USED_F_NO_NOTIFY in virtio devices
- Revert "Initialize EmuVariable NV storage memory with varstore from
ROM"
- Add AcrnEmuVariableFvbRuntimeDxe to support NV storage
- Enable ahci driver.
Secure boot is supported from this release onwards.
Tracked-On: #3506
Signed-off-by: Peter Fang <peter.fang@intel.com>
- Cleanup unused and unsupported function of AcrnRtc
- Remove SMBIOS support
- Add ResetSystemLib for ACRN
- Disable BhyveFwCtlLib
- Disable COM2
- Avoid connecting all system drivers
- Speed up Ps2KeyboardDxe
- Created new Rtc driver and optimized RtcInit and RtcGetTime
- Initialize EmuVariable NV storage memory with varstore from ROM
- Switch to BasePciLibPciExpress
- Avoid exhaustive PCI bus scanning during PCI host bridge
initialization
- Add support for ACRN platform initialization
- Add ACRN's Host Bridge Device ID
Tracked-On: #3226
Signed-off-by: Peter Fang <peter.fang@intel.com>
- Remove QemuFwCfg/QemuFwCfgS3Lib
- Use ACRN E820 map to query system memory size
- Support 64-bit PCI host aperture via ACRN E820
- Remove debug code in release build
- Take out unnecessary OVMF drivers
- Revert "Enable MP support"
- Use CPUID 0x40000010 to determine tsc frequency
Tracked-On: #2868
Signed-off-by: Peter Fang <peter.fang@intel.com>
Peter Fang