Commit Graph

4 Commits

Author SHA1 Message Date
dongshen 36c4a27abc HV: Fix VPCI bugs found in integration testing for partition mode
Tracked-On: #1126
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-09-03 11:26:30 +08:00
dongshen c9ea8901e6 HV: VPCI coding style fix
- Converted MACROS to functions
- Defined pci_bar_type enum
- Defined pci_bdf as union instead of uint16_t to eliminate macros
- Use L or UL postfix after unsigned integers

Tracked-On: #1126
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-09-03 11:26:30 +08:00
dongshen 181de19cba HV: Adding passthru vdev device support for partition hypervisor
V4:
 - Renamed members for struct pcibar and changed code accordingly

V3:
 - Do not use ASSERT
 - Use EPT_XX defines when claling ept_mr_add
 - Report 64-bit MMIO physical bar to UOS as 32-bit virtual bar
   (assume bar size is always less than 4GB), which removed quite some of
   64-bit bar handling code

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
dongshen 86180bd4ce HV: Calling into VPCI init/unit functions for partition hypervisor
V4:
 - Clear address cache info after a full cf8/cfc access
 - Add NULL pointer checking when calling init/deinit ops

V3:
 - Do not use ASSERT
 - Loop through the vdev list defined in vm_desctiption table to call the vdev init/unit functions
 - Make the cached vbdf info struct per vm instead of per pcpu

V2:
 - Fixed MISRA violations

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00