Commit Graph

147 Commits

Author SHA1 Message Date
Zheng, Gen 6b1782b360 refine: remove redundant data type definition
remove data defination of mmio_addr_t, vaddr_t, paddr_t,
and ioport_t.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:54 +08:00
Jack Ren f3db18b981 version: v0.1-rc4
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:25:50 +08:00
Zheng, Gen c8116fc7c9 spinlock: bug fix in spinlock code
Using ebx will truncate the high 32bit part of 64bit virtual address.
So using rbx instead of ebx.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen c5fabf55a0 sprintf: bug fix in sprintf implemented code
In the case that the copy sz is 0, it is unnecessary to do copy.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Yonghua Huang 9b37e1464c add IO requrest 'req_buf' check before reference
This address maybe invalid if a hostile address was set
in hypercall 'HC_SET_IOREQ_BUFFER'.it should be validated
before using.

Update:
  -- save HVA to guest OS's request buffer in hyperviosr
  -- change type of 'req_buf' from 'uint64_t' to 'void *'
  -- remove HPA to HVA translation code when using this addr.
  -- use error number instead of -1 when return error cases.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:27 +08:00
Fei Jiang 3a3aeac09f VMX: change PAT register default value
This is workaround patch to resolve Disti performance issue.
In kernel 4.14, PAT is skipped to initialize if MTRR is not enabled,
while graphics driver need set WC to GGTT memory to accelerate memcpy,
if PAT is not initialized, default PAT register will treat UC- as
uncacheable, which will impact gfx performance. Change PAT default
register value to treat UC- as WC to workaroud this problem.

Revert me when PAT/MTRR strong correlation is removed in kernel.

Signed-off-by: Fei Jiang <fei.jiang@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 52c020c6f0 VMX: bug fix on operating vmx
Switch all the referenced virtual address to physical address
include ept mapping, vmcs field, vmxon, vmclear, and vmptrld.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 7ed446e63b ptdev: bug fix on operating list
Before using a node of list, initialize it.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
2018-05-15 17:25:27 +08:00
Minggui Cao 72b2cb1fa7 remove deadcode of rdtsc_handler/rdtscp_handler
Guest OS rdtsc/rdtscp doesn't trap into hypervisor, so remove them.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 1e2c201827 vtd: add page allocation check for root_table & context_table
if failed to allocate page structure for root_table or context_table,
ASSERT system and return.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 4ea7588241 vtd: context_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for context_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 403076e6b9 vtd: dmar_uint->root_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for root_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Zheng, Gen 3847a4d1a9 hypercall: bug fix on the address convertion while hypercall
Before copy data between guest and host, should convert the GPA
to HVA and do the copy.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Chen, Jason Cl <jason.cj.chen@intel.com>
Reviewed-by: Yakui, Zhao <yakui.zhao@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ ebba622d78 mmu: add mmu invlpg support
when host mmu got updated, it should invalidate TLB & page-struct cache.

currently, there is no mmu update will be done after any AP start, so the
simplest way(to avoid shootdown) is just do invlpg for BSP.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 2d6c75408e mmu: refine the checking of entry present
- change the input param of check_page_table_present from struct map_params
  to page_table_type
- check EPT present bits misconfiguration in check_page_table_present
- change var "table_present" to more suitable name "entry_present"

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 60425f91b4 mmu: add ept execution only capability check
check IA32_VMX_EPT_VPID_CAP MSR to see if ept execution only capability
is supported or not

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ b7d57a946b cpu: change cpu_halt name to cpu_dead
cpu_halt actually mean cpu dead in current code, so change it with
more clear name.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ 96f7ff3be1 cpu: add physical cpu active bitmap support
use pcpu_active_bitmap presents which cpu is active

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 0a0ff19eaa hv: Remove hpet from acrn.conf
Remove clocksource=hpet from SOS kernel cmdline, as ACRN is providing
tsc and hpet will not be supported in the future

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:25:26 +08:00
Binbin Wu d0c773f22d vtd: fix memory coherency issue of vtd table
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Binbin Wu 4c6f11fe8d mmu: add cflush api
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Yonghua Huang a0b7fb81b4 Add range check for 'vm0_gpa' before creating EPT
Input('vm0_gpa') should be validated when handling
hypercall 'HC_VM_SET_MEMMAP to create EPT for UOS
in 'hcall_set_vm_memmap()' function.
at least 'hpa' range (from 'vm0_gpa') can't overlap
hypervisor memory region.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:26 +08:00
Yonghua Huang 06bd73c765 remove 'noxsave' in acrn.conf
- xsave is enabled for guests

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:26 +08:00
Rusty Lynch 6e15aee3b0 Fix warning about unused variable
Signed-off-by: Rusty Lynch <rusty.lynch@intel.com>
2018-05-15 17:25:26 +08:00
Geoffroy Van Cutsem e479924890 Add 'findutils' to Fedora-based Docker images
The 'find' command was not installed in our minimal Fedora 26
and 27-based Docker images. This resulted in a non-fatal error
when performing a 'make clean'. This commit adds this utility
(available in the 'findutils' package).

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ f98a7ca90a vlapic: apicv_get_apic_access_addr should get hpa
APIC-access page which write into VMCS should be hpa

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ 241efb2da6 vlapic: apicv_get_apic_page_addr should get hpa
virtual-ACPI page which write into VMCS should be hpa

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Qi Yadong ef0c5ec2e3 hv: cache tsc_offset
Guest write tsc: cache the offset into run_context.tsc_offset;
Guest read tsc : use run_context.tsc_offset to calculate guest_tsc.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 51414536fa hv:add suffix(UL)for MACRO(SECURE_WORLD_ENABLED)
Now the MACRO SECURE_WORLD_ENABLED (1<<0)
Change it to 64 bit data
SECURE_WORLD_ENABLED (1UL<<0)

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Mingqiang Chi 9aa9a77457 mmu:create temporary page tables for guest at run time
Before this patch, guest temporary page tables were generated by hardcode
at compile time, HV will copy this page tables to guest before guest
launch.

This patch creates temporary page tables at runtime for the range of 0~4G,
and create page tables to cover new range(511G~511G+16M) with trusty
requirement.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:26 +08:00
Zheng, Gen 4d0f26d0e1 UEFI: update acrn.conf and Document
Since the boot flow had been changed to that sos kernel is lanuched
by cl bootloader directly, replace the payload acrn.efi with bzImage.efi
in the acrn.conf file, and specify ROOTDEV with UUID in the command line.

The UEFI firmware launches the EFI/org.clearlinux/bootloaderx64.efi
as os loader not the EFI/BOOT/BOOTX64.EFI, so fix the issue in the document
ACRN_UEFI.txt which guides user with incorrect steps.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Jack, Ren <jack.ren@intel.com>
2018-05-15 17:25:26 +08:00
Qi Yadong 7430074a12 trusty: initialize tsc_offset to zero
Per trusty design, trusty requires a monotonic increasing
secure tick(TSC) at run time. This secure tick will used
to mitigate password/pin force attack, control key expiration,
etc.

Currently, the TSC_OFFSET is enabled. And guest will got
(host_tsc + tsc_offset) when execute rdtsc/rdtscp/rdmsr to
aquire tsc value. The host_tsc is always keeping increasing
during the runtime.

So initialize tsc_offset of trusty to 0 will ensure the
secure tick feature.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ bf36022ce9 ept: change eptp to PA
eptp should be record as PA.

this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type,
necessary HPA2HVA/HVA2HPA transition is used for them after the change.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ 8682552273 mmu: identify VA and PA in mmu.c
- read/write page table entries should use VA which defined as "void *"
- the address data in page table entries should us PA which defined as
  "uint64_t"

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun 24ea869e25 HV: add px data of bxt j3455 SOC
The cpu model name of "Intel(R) Celeron(R) CPU J3455 @ 1.50GHz" is used for
APL NUC which is in Acrn official suport list.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun 7647517a15 HV: trap and validate px request
Currently acrn partitions cpus between SOS and UOS, so the default
policy is to allow guest managing CPU px state. However we would
not blindly passthrough perf_ctrl MSR to guest. Instead guest access
is always trapped and validated by acrn hypervisor before forwarding
to pcpu. Doing so leaves room for future power budget control in
hypervisor, e.g. limiting turbo percentage that a cpu can enter.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun 1d0d4d3185 HV: add hypercall interface of get vcpu state data
We can use this interface for VHM to pass per-cpu power state data
to guest per its request.

For now the vcpu power state is per-vm, this could be changed if
per-cpu power state support is required in the future.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun 0e2b9fc7fa HV: setup px info when create vm
The vm px info would be used for guest Pstate control.
Currently it is copied from host boot cpu.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun a28fbd15b5 HV: load cpu px data in boot
The patch takes Intel ATOM A3960 as example that hard code all Px info
which is needed for Px control into Acrn HV and load it in boot process.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Victor Sun 4cd2717038 HV: add cpu model name
The cpu model name would be used to distinguish which hard coded data
need to be loaded to boot_cpu_data;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ 878b5a0466 mmu: refine functions for invept
- rename mmu_invept to invept
- panic if HW doesn't support invept

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ a68850e00f mmu: replace ASSERT with panic in fetch_page_table_offset
all callers for fetch_page_table_offset should already make sure
it will not come to an unknown table_leve, so just panic here.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ c2f86f23c3 mmu: refine functions walk_paging_struct & update_page_table_entry
- walk_paging_struct should return sub_table_addr, if something wrong,
  it return NULL
- update_page_table_entry should return adjusted_size, if something wrong
  it return 0

the change is valid under release version, as at that time, ASSERT in
walk_paging_struct is empty.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ bb82504f05 mmu: refine functions get_table_entry & obtain_last_page_table_entry
- remove unused map_params in get_table_entry
- add error return for both, which is valid under release version,
  as at that time, ASSERT in get_table_entry is empty.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ cbcc7c0db3 mmu: refine function break_page_table
function break_page_table should return next_level_page_size, if
something wrong, it return 0.

the change is valid for release version, as at that time ASSERT()
in break_page_table is empty.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ 6454c7be6b mmu: refine function map_mem_region
function map_mem_region should return mapped_size, if something wrong,
it return 0.

the change is valid for release version, as at that time ASSERT()
in map_mem_region is empty.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jason Chen CJ fa3e424fcf mmu: refine functions modify_paging & map/unmap/modify mem
add error return for all, which is valid under release version,
as at that time, ASSERT in modify_paging is empty.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Jack Ren ec1cbbb660 UEFI: get the guest entry address explicitly
Previously with the help from gcc, __builtin_return_address(0) is
used as the guest entry address, but it can't work well with gcc 7.3
and leads to the guest unable to return to UEFI correctly.
Let's get it explicitly.

Signed-off-by: Jack Ren <jack.ren@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
Geoffroy Van Cutsem c5c4b63150 Travis CI: enable Ubuntu 16.04 and Fedora 26 testing
Enable compilation test for Fedora 26 and Ubuntu 16.04. The tests
will run for all combinations of RELEASE={0|1} and PLATFORM={sbl|uefi}

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 17:25:24 +08:00
Geoffroy Van Cutsem 1ac5a2aebd Enable Travis CI for all combinations
Enable the Travis CI testing for all combinations of variables
that can be set at compile-time. I.e. RELEASE={0|1} and
PLATFORM={0|1}

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 17:25:24 +08:00