Commit Graph

313 Commits

Author SHA1 Message Date
Jason Chen CJ 63ef1236de move global x2apic_enabled into arch dir
the x2apic_enabled should be x86 specific field.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ 8a95b2abdc vcpu: add ext context support for world switch
move most of fields from run_context into ext_context for world switch.
these fields do not need doing runtime save/restore during vm exit/entry.

v3:
- update cr0/cr4 registers switch method

v2:
- use struct name ext_context instead of saved_context
- updated according to previous v2 patch

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ 3d5d6c96ec vcpu: add get/set register APIs
there will be 3 types of vcpu runtime contexts:
- runtime contexts always saved/restored during VM exit/entry, which
  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and
  msr for spectre control (ia32_spec_ctrl)
- runtime contexts on-demand cached/updated during VM exit/entry, which
  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4
- runtime contexts always read/write from/to VMCS, which include left
  registers not in above

this patch add get/set register APIs for vcpu runtime contexts, and unified
the save/restore method for them according to above description.

v3:
- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,
  use on-demand cache for reading, but always write to VMCS for writing.

v2:
- use reg_cached/reg_updated for on-demand runtime contexts
- always read/write cr3 from/to VMCS

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Xiangyang Wu 5aa1ad3bfc HV:treewide:fix value outside range of underlying type
There are potential value outside range of underlying type
in some assignment expressions. This violates Rule 10.3 or
Rule 10.4 of MISRA C:2012.
BTW, all operations shall be conducted in exactly the same
arithmetic (underlying) type, otherwise, there is a
value outside range violation.

Update related assignment expressions.

V1-->V2:
	* Fix potential overflow in "pit_calibrate_tsc";
	* Move PTDEV_INVALID_PIN definition before
	  get_entry_info since this MACRO is only used by
	  debug function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:07:41 +08:00
Yan, Like c663267b03 hv: timer: request timer irq once only
Since global vector table is being used on all pcpus, it's not necessary to request timer irq
at each cpu init. With this change, per_cpu timer nodes are removed, and only BSP registers
and unregisters timer irq.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 16:06:22 +08:00
Shiqing Gao b4a2ff5022 hv: treewide: fix 'Prototype and definition name mismatch'
Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:04:40 +08:00
Yu Wang 1e1886794e hv: vioapic: remove EOI register support
The IOAPIC specification defined EOI register for 0x20 version. The
original vioapic code implemented this register but the version was
still export as 0x11.

Tried to set 0x20, the Linux kernel has't access this EOI register,
still rely on lapic to send eoi.

From Linux ioapic driver comments, it says that only send EOI via EOI
register when met IOAPIC hardware bug.

This patch removes all 0x20 IOAPIC code to reduce the code size.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-06 12:32:35 +08:00
Yu Wang f96f048f71 hv: vioapic: change the variable type of pin to uint32_t
To make vioapic simpler, avoid lots of code to convert variable type
between uint8_t and uint32_t.

This patch changes all variable type of pin related variables to
uint32_t instead of original uint_8.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-06 12:32:35 +08:00
Mingqiang Chi 7345677bbb hv:cleanup vmid related code
Remove structure vm_attr
Wrap two APIs alloc_vm_id and free_vm_id

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 12:27:53 +08:00
Yonghua Huang 2299926a88 HV: Refine 'hv_main()' function usage
'hv_main()' wraps several logic which has no dependencies
   each other(enable VMX, prepare to create service os VM..),
   in this case, split this function to make code logic clear.

   remove 'is_vm0_bsp()' & 'hv_main()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 10:34:43 +08:00
Sainath Grandhi 6643adff8b HV: Adding mptable support for partition mode ACRN
Partitioning mode of ACRN needs to build mptable for UOS.
UOS uses mptable instead of ACPI tables.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-03 13:36:40 +08:00
Shiqing Gao fd0c9187ef hv: treewide: fix 'Procedure parameter has a type but no identifier'
Add the parameter identifier for typedef function pointer.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-03 13:29:24 +08:00
Arindam Roy 37026590c9 HV: Rename functions, variables starting with "_"
In order to comply with MISRA C rules, renamed vairables
and function names starting with "_".
The major changes invloves mostly static function
names, as they are being called inside the same file
by a wrapper function.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-08-03 12:49:01 +08:00
Shiqing Gao a71dedecd4 hv: treewide: fix 'Array has no bounds specified'
MISRAC requires that the array size should be declared explicitly.

This patch fixes the issues caused by the arrays that are defined in
link_ram.ld.in or assembly file.

v1 -> v2:
 * Update the solution based on the info from the following link.
   https://sourceware.org/binutils/docs/ld/Source-Code-Reference.html

   Fix pattern is like below:
   extern char start_of_ROM, end_of_ROM, start_of_FLASH;
   memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - &
start_of_ROM);

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 12:40:21 +08:00
Mingqiang Chi a3b44a2fa8 hv:Replace 0(cpu_id) with BOOT_CPU_ID
Replace 0(pcpu_id/vcpu_id) with BOOT_CPU_ID

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 11:27:52 +08:00
Li, Fei1 8f39a22961 hv: cpu: remove unnecessary cpu_id valid check
Remove unnecessary cpu_id valid check if the cpu_id comes from
get_cpu_id().

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-02 15:21:34 +08:00
Mingqiang Chi ae8836d960 hv:fix return value violation for vioapic_get_rte
Change this API to void type
Add pre-condition, state the input parameters are not NULL.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 14:47:43 +08:00
Mingqiang Chi 61782d7430 hv:Rename port/mmio read and write APIs
mmio_write_long --> mmio_write32
mmio_write_word --> mmio_write16
mmio_write_byte --> mmio_write8
mmio_read_long  --> mmio_read32
mmio_read_word  --> mmio_read16
mmio_read_byte  --> mmio_read8

io_write_long --> pio_write32
io_write_word --> pio_write16
io_write_byte --> pio_write8
io_read_long  --> pio_read32
io_read_word  --> pio_read16
io_read_byte  --> pio_read8
io_write      --> pio_write
io_read       --> pio_read

setl --> set32
setw --> set16
setb --> set8

igned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-08-02 14:03:38 +08:00
Yin Fengwei f576f97ea8 hv: add vm restart API
And export the API to DM. DM will do system reboot/S3 resume based
on this API.

Also add the pre-assumption description for some vm APIs.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 13:14:03 +08:00
Shiqing Gao 51c75e9e3c hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 15:53:29 +08:00
Li, Fei1 457ecd6ef7 hv: softirq: refine softirq
1. add register_softirq to register a softirq handler
2. rename exec_softirq to do_softirq; raise_softirq to fire_softirq.
3. in do_softirq call registered softirq handler not call
the device softirq handle function directly
4. enable irq after vm exit and disable irq after the first
call do_softirq before vm enter.
5. call do_softirq again when irq disabled to handle the risk
unhandled softirq.
6. rename SOFTIRQ_DEV_ASSIGN to SOFTIRQ_PTDEV
7. remove SOFTIRQ_ATOMIC

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 11:36:27 +08:00
Li, Fei1 073583cc41 hv: softirq: move softirq.c to common directory
Softirq is not x86 architectural related.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-01 11:36:27 +08:00
Yin Fengwei 13a50c929d hv: Explicitly trap VMXE and PCIDE bit for CR4 write
Now, we let guest own most CR4 bit. Which means guest
handles whether the CR4 writting is invalid or not and
GP injection if it's invalid writing.

Two bits are exception here:

we filter VMX and PCID feature to guest (which means
they are supported on native).

So we can't depends on guest to inject GP for these bits.
Instead, we should explicitly trap these CR4 bits update
and inject GP to guest from HV.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-01 11:35:30 +08:00
Yin Fengwei f0ef41c754 hv: Extend the always off mask of CR0 and CR4
According to SDM:
writing a nonzero value to 63:32 bits of CR0 and CR4 results #GP(0).
writing a nonzero value to reserved bit of CR4 results #GP(0).

We merge the check with always off mask of CR0 and CR4.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-01 11:35:30 +08:00
Xiangyang Wu 6e77a8d5f1 HV:treewide:rename enum vpic_wire_mode, stack_canary, segment_override, pde_index
For data structure types "enum vpic_wire_mode, struct stack_canary",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected by static analysis tool.
For variables "segment_override, pde_index", its name is identical
with function name. This MISRA C  violation is detected.
Naming convention rule:Variable name can be shortened from
its data structure type name.

The following udpates are made:
enum vpic_wire_mode vpic_wire_mode-->enum vpic_wire_mode wire_mode
struct stack_canary stack_canary-->struct stack_canary stk_canary
uint8_t segment_override:1 --> uint8_t seg_override:1
uint32_t pde_index--> uint32_t pde_idx

V1-->V2:
	Remove update "enum cpu_state cpu_state-->enum cpu_state state"
	and "enum irqstate irqstate-->enum irq_ops_mode ops_mode", other
	patch will cover it.
V2-->V3:
	Update "uint32_t pde_index--> uint32_t pde_idx".

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-07-31 11:20:21 +08:00
Wei Liu 52fe9f419f hv: use macro instead of specify number
use macro instead of specify number

Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 11:17:11 +08:00
Xiangyang Wu 2c95a8c4aa HV:treewide:rename struct pic and iommu_domain
For data structure types "struct pic and struct iommu_domain",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected.

Naming convention rule:If the data structure type is used by only one
module and its name meaning is simplistic, its name needs prefix
shorten module name.
Naming convention rule:Variable name can be shortened from its
data structure type name.

The following udpates are made:
struct pic pic-->struct i8259_reg_state i8259
struct iommu_domain iommu_domain-->struct iommu_domain iommu

V1-->V2:
	Update "struct iommu_domain iommu_domain-->struct iommu_domain iommu"

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-31 10:33:22 +08:00
Junjie Mao 17771c0ac2 HV: io: refine state transitions of VHM requests
Instead of using two members for maintaining the state of a VHM request, this
patch replaces the transitions with a single state. Basically the lifecycle of a
VHM request shall be:

    FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...

The structure header of vhm_request has more details of the transitions access
limitations under different states.

Also drop the set but unused member vcpu.ioreq_pending.

For backward-compatibility, the obsolete 'valid' member is still kept and
maintained before SOS and DM adapts to the new state transitions.

v2 -> v3:

    * Use complete_ioreq to mark an I/O request finished in
      dm_emulate_(pio|mmio)_post.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Junjie Mao 941eb9db02 HV: io: move I/O emulation post-work to io.c
There are some functions for the post work of I/O emulation. This patch moves
these functions to io.c for clarity. No functional change introduced.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Junjie Mao b21b172347 HV: io: refactoring vmexit handler on EPT violation
This is the counterpart to the PIO emulation side.

1. ept_violation_vmexit_handler (entry point for handling vmexit on EPT instruction):

    Extract mmio address, size, direction and value (for write only), fill in an
    I/O request, invoke do_io to handle that and emulate_pio_post for
    post-processing.

2. emulate_io

    Handle the given I/O request, either completed by registered MMIO handlers
    or sent to VHM.

3. emulate_mmio_post:

    Update guest registers after the emulation is done.

v2 -> v3:

    * Rename: emulate_mmio_by_handler -> hv_emulate_mmio.
    * Inline the original hv_emulate_mmio.
    * No longer check alignment. The handlers are responsible for handling
      unaligned accesses.

v1 -> v2:

    * Rename: do_io -> emulate_io.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Junjie Mao 50e4bc1758 HV: io: refactoring vmexit handler on I/O instruction
This patch refactors how I/O instructions are emulated, in order for a unify the
I/O emulation path. The major control flow includes:

1. pio_instr_vmexit_handler (entry point for handling vmexit on I/O instruction):

    Extract port address, register size, direction and value (for write only),
    fill in an I/O request (of type io_request), invokes do_io to handle that
    and update the guest registers if the request has been successfully handled
    when do_io returns.

2. emulate_io:

    Handle the given I/O request. The request is handled or sent to VHM if it
    returns 0 (the actual status can be found in io_req->processed). On errors a
    negative error code is returned.

3. emulate_pio_by_handler:

    Look for the PIO handler for the given request and invoke that
    handler. Return 0 if a proper handler is found and invoked (the status of
    the emulation can be found in io_req->processed), -EIO when the request
    spans across devices, and -ENODEV when no handler is found.

4. emulate_pio_post:

    Update guest registers after the emulation is done. Currently this can
    happen either right after do_io() or after the vcpu is resumed. Status check
    on the I/O request and follow-up actions on failure will also go here.

Note:

Currently do_io can return 0 with io_req->processed being REQ_STATE_PENDING if
the request is sent to VHM for further processing. In this case the current vcpu
will be paused after handling this vm_exit, and dm_emulate_pio_post will be
invoked to do the rest after this vcpu is resumed. When vcpus are scheduled back
to exactly where they are scheduled out later, do_io should be responsible for
the post_work and the processing of do_io results shall be mostly the same.

v2 -> v3:

    * Rename: emulate_pio_by_handler -> hv_emulate_pio.
    * Properly mask the value passed to port I/O handler.

v1 -> v2:

    * Rename: do_io -> emulate_io.
    * Rename io_instr_vmexit_handler -> pio_instr_vmexit_handler to reflect the
      fact that it handles port I/O only.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Xiangyang Wu 159d57b703 HV:treewide:rename union lapic_id and struct segment
For data structure types "union lapic_id and struct segment",
its name is identical with variable name in the same scope. This MISRA C
violation is detected by static analysis tool.

Naming convention rule:If the data structure is corresponding
to hardware resource (such as register, segment selector),
its name need resource shorten name suffix (such as _reg, _sel).

The following udpates are made:
union lapic_id-->union lapic_id_reg
struct segment-->struct segment_sel

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-30 10:18:39 +08:00
Xiangyang Wu c477211d4e HV:treewide:rename struct key_info, pir_desc, map_params
For data structure types "struct key_info, struct pir_desc,
struct map_params", its name is identical with variable name
in the same scope. This MISRA C  violation is detected by
static analysis tool.
Naming convention rule:If the data structure type is used by only one
module and its name meaning is simplistic, its name needs prefix
shorten module name.

The following udpates are made:
struct key_info-->struct trusty_key_info
struct pir_desc-->struct vlapic_pir_desc
struct map_params-->struct mem_map_params

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-30 10:18:39 +08:00
Xiangyang Wu 8205c9a482 HV:INSTR_EMUL:Rename struct vie, vie_op, and emul_ctxt
For data struct type struct vie, emul_ctxt, its name
is identical with variable name in the same scope.
This MISRA C violation is detected by static analysis
tool.
According to naming convention rule: If the data structure
type is used by only one module and its name meaning is
simplistic, its name needs prefix shorten module name.
Follow the same rule, data structure name "vie_op" needs
to be renamed;

The following updates are made in this patch:
struct vie-->struct instr_emul_vie
struct vie_op-->struct instr_emul_vie_op
struct emul_ctxt-->struct instr_emul_ctxt

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-30 10:16:36 +08:00
Xiangyang Wu 3446e84ea5 HV:treewide:rename struct timer as struct hv_timer
The variable timer's name is identical with struct
timer s name. This MISRA C violation is detected
by static analysis tool.
According to naming convention rule: If the data
structure type is used by multi modules, its
corresponding logic resource is only used by
hypervisor/host and isn't exposed to external
components (such as SOS, UOS), its name meaning
is simplistic (such as timer), its name needs prefix
"hv_".

Rename struct timer as struct hv_timer.
Replace regular expression:s/struct timer\([ ),;\t\*]\+\)
/struct hv_timer\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-30 10:16:36 +08:00
Arindam Roy a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Huihuang Shi 496e40072e HV:treewide:fix rest of violations related parameter changed
Misra c required parameter should not changed in the scope
of function,use local variable to replace it.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-27 16:42:19 +08:00
Huihuang Shi 59771ff461 HV:treewide:fix "Reference parameter to procedure is reassigned"
Parameter's type which is pointer should not be changed in the
scope of function,assign it's value to local variable to fixed
it out.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 12:17:12 +08:00
Xiangyang Wu 58b42baa74 HV:treewide:rename struct vpic as struct acrn_vpic
There are many naming violations detected by static analysis
tool. Data structure type name is the same as variable name.
According to naming convention rules, If the data structure
type is used by multi modules and its name meaning is
simplistic (such as vcpu, vm), its name needs prefix "acrn_".

Rename struct vpic as struct acrn_vpic.
Replace regular expression:s/struct vpic\([ ),;\t\*]\+\)/struct acrn_vpic\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:12 +08:00
Xiangyang Wu 33fdfd05f1 HV:treewide:rename struct vlapic as struct acrn_vlapic
There are many naming violations detected by static analysis
tool. Data structure type name is the same as variable name.
According to naming convention rules, If the data structure
type is used by multi modules and its name meaning is
simplistic (such as vcpu, vm), its name needs prefix "acrn_".

Rename struct vlapic as struct acrn_vlapic
Replace regular expression:s/struct vlapic\([ ),;\t\*]\+\)/struct acrn_vlapic\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:12 +08:00
Junjie Mao 88f74b5dbb HV: io: unify vhm_request req and mem_io in vcpu
The current struct vcpu has two members, namely 'struct vhm_request req' and
'struct mem_io mmio', that hold similar info, including the address, direction, size,
value and status of mmio reqeusts.

As a step towards a unified framework for both MMIO/PIO, this patch unifies
these two members by a tailored version of vhm_reqeust, mostly with the reserved
fields dropped. The definitions to request types, directions and process status
are reused.

Handling errors during emulations will be revisited after the I/O emulation
paths are unified. Thus for this patch the mmio.mmio_status in inherited by
io_req.processed which is not yet properly processed.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Junjie Mao 1915eec632 HV: io: separate I/O emulation interface declarations
Currently the I/O emulation structures and interfaces are scattered among mmu.h,
io.h and guest.h, and tangled with other interfaces there. This patch moves the
former to a separate header ioreq.h.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Li, Fei1 f815415b70 hv: ept: add lookup_address to lookup the page table
Add lookup_address to lokup the page table for a virtual address
of primary page table or a physical address of extended page table.
The remaining obtain_last_page_table_entry could be removed with their
called function later.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-07-26 12:46:34 +08:00
Li, Fei1 e2516fa6a0 hv: mmu: reimplement mmu_add to add page table mapping
The ept_mr_add still use the old map_mem. The old API will
keep for a peroid until the SOS the same refine be merged.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-07-26 12:46:34 +08:00
Li, Fei1 c7799584dc hv: mmu: replace the old mmu_del
1. use ept_mr_del to delete EPT memory region.
2. remove unmap_mem
3. remove mem_map_request_type

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-07-26 12:46:34 +08:00
Li, Fei1 236bb10e4d hv: mmu: refine delete page table mapping
Merge mmu_modify with mmu_del to mmu_modify_or_del(..., type).
While type is MR_MODIFY, the actual action is doing mmu_modify; while
type is MR_DEL, the actual action is doing mmu_del.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 12:46:34 +08:00
Huihuang Shi 5189bcd272 HV:treewide:fix "Attempt to change parameter passed by value"
In the function scope,the parameter should not be
changed as Misra required.
V1->V2 recover some violations because of ldra's false positive.
V2->V3 sync local variable' type to parameter's type with the prefix of const.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 09:35:52 +08:00
Jason Chen CJ 589c72382a add CONFIG_VM0_DESC support
if defined CONFIG_VM0_DESC, HV will use predefined vm0_desc to config
VM0, otherwise, HV will run VM0 with all physical cpus.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Jason Chen CJ 22833787ce refine definition for foreach_vcpu
foreach_vcpu will go through all vcpu_array and only call the following
code when vcpu != NULL

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Huihuang Shi a661ffa618 fix x86 dir integer violations
Fix x86 directory violations which related to integer problems,
some of problems are skipped because of ldra's false positive.

V1->V2 1.modified the code style
       2.fix all macro VM_EXIT_IO_INSTRUCTION related

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-25 15:29:34 +08:00