Commit Graph

544 Commits

Author SHA1 Message Date
Binbin Wu 68643b619f hv: vcpuid: leaf 0dh is percpu related
cpuid leaf 0dh is percpu related, no need to init in vcpuid_entries for vm.

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 14:55:42 +08:00
Huihuang Shi 1b37ed50d8 hv: vmcall: fix "goto detected" violations
Remove the goto by split the function into two,
dispatch_hypercall and vmcall_vmexit_handler.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-24 09:57:43 +08:00
Binbin Wu c3250030aa hv: vcpuid: remove unnecessary check code
The removed check code is not necessary.

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-21 19:44:20 +08:00
Binbin Wu 83f32c93f0 hv: vcpuid: leaf 02h has no subleaf, delete un-needed code.
According to SDM Vol. 2A 3-191 & Vol. 2A 3-213, leaf 02h has no subleaf.
This patch removes the un-needed code.

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-21 19:44:20 +08:00
Jason Chen CJ ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 8aae0dff87 scheduler: refine make_reschedule_request
just use pcpu_id for make_reschedule_request is enough

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Li, Fei1 0a713e6fbc hv: coding style: refine set_vcpuid_entries to one exit
Fix procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 22:07:53 +08:00
Li, Fei1 a56abee9ff hv: coding style: refine find_vcpuid_entry
1) add local_find_vcpuid_entry to find whether a cpuid leaf exist
in vcpuid cache entries.
2) find_vcpuid_entry will return the found entry if local_find_vcpuid_entry
return is not null. Otherwise, call local_find_vcpuid_entry again
when necessary.
In this case, there could eliminate recursion in find_vcpuid_entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 22:07:53 +08:00
Minggui Cao 58d2a418d5 HV: fix pm code for multi-exits & unsigned const
1. change multi "return" to one exit.
2. add "U" to unsigned const as postfix.

Tracked-On: #861
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 21:56:48 +08:00
Mingqiang Chi 81a9de6067 hv:fix MISRA-C violations in create_vm
-- fix "more than one exit point" and "goto detected" violations
-- change prepare_vm0_memmap to void type
-- Add free_vm_id when create vm failed

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 18:47:57 +08:00
Zide Chen bb47184f3c hv: fix enable_msr_interception() function
Fixed three MISRA-C violations:
11S: No brackets to loop body
7C: Procedure has more than one exit point.
8D: DD data flow anomalies found.
  initialize read_map and write_map in the declaration statements.

Fixed one bug:
Use "msr <= 0x1FFFU" instead of "msr < 0x1FFFU" because 0x1FFF is a valid MSR
bitmap address.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 18:46:19 +08:00
Zide Chen d133f95d97 hv: fix MISRA-C violations "Pointer param should be declared pointer to const."
MIRSA-C requires the const qualifier should be applied to pointer parameters
that address data not subject to change in rule 120D.

Tracked-On #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:03:03 +08:00
Minggui Cao f81fb21a58 HV: modularization to refine pm related code.
1. move out vm related code from arch/pm.
2. remove unnecssary global variables.
3. keep the global variables as static, not used
by other modules directlly.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:02:09 +08:00
Yonghua Huang 03262a96cf hv: refine coding style for ucode.c
- reduce exit points for 'acrn_update_ucode()' function.

Tracked-On: #2095
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:44:42 +08:00
Zide Chen 4c28e98dc4 hv: refine a few functions to only one exit point
IEC 61508,ISO 26262 standards highly recommend single-exit rule.
7C: Procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 09:17:30 +08:00
Mingqiang Chi 64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Jason Chen CJ 97132acccf Make ibrs_type as internal variable
add get_ibrs_type API to get ibrs type.
this patch fix Misra C violation:
filename:/hypervisor/arch/x86/security.c  function:None  offset:19:
       reason:Variable should be declared static. : ibrs_type

Tracked-On: #861
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 5968da4635 move security related funcs into security.c
there are still some security related funcs in cpu_caps.c & cpu.c,
move them out into security.c.

Changes to be committed:
	modified:   Makefile
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   arch/x86/guest/vcpu.c
	new file:   arch/x86/security.c
	modified:   arch/x86/trusty.c
	modified:   arch/x86/vmx_asm.S
	modified:   include/arch/x86/cpu.h
	modified:   include/arch/x86/cpu_caps.h
	modified:   include/arch/x86/per_cpu.h
	new file:   include/arch/x86/security.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Mingqiang Chi 65a7be8f52 hv:refine alloc_vm_id api
Fix violation "procedure has more than one exit point"
for this api.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 16:31:21 +08:00
Zhipeng Gong c547e9cfb4 hv: enable/disable snoop control bit per vm
For security, this patch add one flag per vm and disable snoop control
for sos and enable snoop control for uos by default.

v2: add one flag in vm, not in iommu domain.
v3: add vm null check

Tracked-On: #2086
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-18 13:45:10 +08:00
Zide Chen 44e9318c45 hv: vmsr: fix MISRA_C violations
106D No prototype for non-static function.
  2 functions missing prototyle declarations in header file.

120S Use of bit operator on signed type.
123S Use of underlying enum representation value.
  enum values are treated like unsigned integer in vmsr.c

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-16 14:52:22 +08:00
Yonghua Huang 4fc5dcfc3e hv: enable SMAP in hypervisor
With SMAP enabled, hypervisor can't access pages that
owned by guest(either SOS or UOS), and an override is
is provided: stac()/clac() to enable/disable access to
guest's memory pages.

 Pre-conditon:
    Mark hypervisor owned pages as supervisor mode (U/S = 0),
       and set all othter memory pages as user mode (U/S = 1).

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Zide Chen c89d6e6526 modularization: clean up namings in vMTRR module
- rename 3 module interface APIs
  init_mtrr() -> init_vmtrr()
  mtrr_rdmsr -> read_vmtrr()
  mtrr_wrmsr() -> write_vmtrr()

- follow naming convention for other modules, rename struct mtrr_state
  to struct acrn_vmtrr. And add acrn_vcpu to it.

- because MTRR is x86 architecture specific, move struct acrn_vmtrr to
  struct acrn_vcpu_arch.

Tracked-on: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen 6bbd0129c3 modularization: move vMTRR code to guest directory
MTRR emulation belongs to virtual CPU component.

- rename mtrr.c to vmtrr.c and move it to arch/x86/guest
- rename mtrr.h to vmtrr.h and move it to include/arch/x86/guest

Tracked-On: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen a958fea7a4 hv: emulate IA32_TSC_ADJUST MSR
Intercept IA32_TSC_ADJUST MSR so that writing IA32_TSC_ADJUST from the
guests won't impact the TSC in root mode or potentially other vCPUs in
the same pCPU.

- MSR TSC_ADJUST needs to be isolated between normal and secure world,
  so it's included in NUM_WORLD_MSRS.
- Upon writing to either IA32_TSC_ADJUST or IA32_TSC from the guests,
  don't write to physical MSRS so it won't impact the host side, but
  update the TSC offset VM-execution control.
- don't need to intercept rdmsr for IA32_TIME_STAMP_COUNTER.
- add the missing statement in save_world_ctx() to save the tsc_offset
  during world switch.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 09:11:37 +08:00
Jason Chen CJ 07427b4ca9 modulization: move virtual cpuid stuff into guest dir
functions like set_vcpuid_entries & guest_cpuid should only
server for virtual cpuid, so move such kind of functions
to guest/vcpuid.c.

and all native cpuid APIs will keep in cpuid.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-13 09:08:02 +08:00
Li, Fei1 e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Minggui Cao 9b58b9d11d HV: improve e820 interfaces and their usages
1. change its APIs as more indepentent, and modify the callers' code
2. limit its global variables as static, and return const to the callers
3. remove unused code in "CONFIG_CMA"

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Minggui Cao b69d24b1d4 HV: separate e820 related code as e820.c/h
1. e820 is modulized as separated files.
2. move boot_regs into multiboot.h as it's related with
multiboot info header

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Zide Chen 9761eede2a hv: cleanup IA32_PAT emulation code r.w.t. to the refactored guest_msrs[]
Currently there are two fields in ext_context to emulate IA32_PAT MSR:
- ia32_pat: hold the value of the emulated IA32_PAT MSR
- vmx_ia32_pat: used for load/store IA32_PAT MSR during world switch

This patch moves ext_context->ia32_pat to the common placeholder for
emulated MSRs acrn_vcpu_arch->guest_msrs[].

Also it renames ext_context->vmx_ia32_pat to ext_context->ia32_pat to
retain same naming convention in struct ext_context.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen b6aaf1b8d9 hv: MSRs may need isolation between normal and secure world
- implement unified APIs to access guest_msrs[] under struct acrn_vcpu.
- use these new APIs to read/write emulated TSC_DEADLINE MSR
- switch world_msrs[] and guest_msrs[] during world switch for MSRs that
  need world isolation
- remove the old guest_msrs[] array and it's index macros.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen 92bbb545cf hv: rearrange data structure for emulated MSRs
Create two arrays for emulated MSRs:
- guest_msrs[] in struct acrn_vcpu_arch: emulation for all MSRs that are
  included in emulated_guest_msrs[].
- world_msrs[] in struct cpu_context: it has separate copies for secure and
  normal world for those MSRs that are in the first NUM_WORLD_MSRS entries
  in emulated_guest_msrs[].

Split vmsr.c/emulated_msrs[] into 3 smaller arrays:
- emulated_guest_msrs[]: corresponding MSRs are emulated in guest_msrs[]
- mtrr_msrs[]: emulated MTRRs are saved in vMTRR module
- unsupported_msrs[]: GP for any guest accesses

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-12-09 21:32:03 +08:00
Li, Fei1 c616a42251 hv: fix string assigned to non const object
String should assigned to const object

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 10:03:44 +08:00
Zide Chen c3c932027d hv: fix "Array has no bounds specified" in vmsr.c
MISRAC requires that the array size should be declared explicitly.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-06 11:20:52 +08:00
Li, Fei1 9bb16bce77 hv: fix type conversion without cast with explicit conversion
Implicit conversion may result in loss of information or undefined behaviour.
So make it with explicit conversion.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Li, Fei1 79463fd5ce hv: avoid using of mixed mode arithmetic
Avoid using of mixed mode arithmetic by using explicit casts

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Li, Fei1 7a62154e36 hv: remove the theoretic infinite loop
There may the theoretic infinite loop with some code. But actually it doesn't.
This patch make these code more obvious it's not a potentially infinite loop.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Sainath Grandhi 9ea93ce620 hv: x2APICv support on platforms without support for APICv reg virtualization
On platforms, that do not support APICv register virtualization, all the
x2APIC MSRs need to intercepted by ACRN for emulation.

Tracked-On: #1973
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-12-05 09:21:27 +08:00
Shiqing Gao f73cf21187 hv: fix 'Unused procedure parameter'
remove the unused procedure parameter

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 18:28:32 +08:00
Shiqing Gao 7cc8566d37 hv: fixes related to unused API and uninitialized variable
This patch does:
- remove the unused API declaration
- fix use of uninitialized variable in instr_emul.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 16:49:49 +08:00
Shiqing Gao b38629b85e hv: fix 'Space missing before or after binary operator'
This patch adds the necessary space before or after binary operator.

v1 -> v2:
 * minor fix related to integer
   [i - 1] ====> [i - 1U]

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-12-04 09:16:04 +08:00
Huihuang Shi 42e38dfb53 hv: fix "No prototype for non-static function"
The function not used in extern c file, must add static.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 09:12:49 +08:00
Shiqing Gao 0f766ca6b8 hv: replace CPU_PAGE_SHIFT with PAGE_SHIFT
- replace CPU_PAGE_SHIFT with PAGE_SHIFT
  These two MACROs are duplicated and PAGE_SHIFT is a more
  reasonable name.
- remove unused MACROs related to page shift in cpu.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao 2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao e1564edda5 hv: fix type conversion violations
This patch fixes the following violations:
 1. Implicit conversion: actual to formal param
 2. Value is not of appropriate type
 3. No cast for widening complex int expression
 4. Widening cast on complex integer expression
 5. Narrower int conversion without cast.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-30 18:14:59 +08:00
Li, Fei1 bd1c0838d1 hv: trusty: reserve memory for trusty
The previous would reserve memory for trusty in SOS kernel. Howerer,
there would no available 16 MB continue memory any more after a long time.
This result in allocating memory for trusty failed. This patch will reserve
memory for trusty in ACRN hypervisor in which case the memory allocation
for trusty will never fail.

Tracked-On: #1942
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-30 16:49:27 +08:00
Zide Chen 79bf121e9b hv: throw GP for MSR accesses if they are disabled from guest CPUID
This patch places all unsupported MSRs in the intercepted_msrs[], but
don't implement any handlers in the switch clauses. Hence any
accesses from guests result in GP exceptions.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 15:03:16 +08:00
Zide Chen 3836d309d0 hv: code cleanup: vmsr.c
- Put most of the emulated MSR number in emulated_msrs[], and remove
  the individual calls to enable_msr_interception().
- vcpu_thread() injects General Purpose exception to the guest if any
  VMEXIT handler doesn't return 0. This patch removes vcpu_inject_gp()
  from all MSR VMEXIT handlers to keep the code clean.
- remove dead code.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 15:03:16 +08:00
Junjie Mao 584f6b7255 doc: replace return with retval
`@return` is dedicated for brief description of return values, not for comments
stating actual return values. In addition, sphinx + breathe does not join
multiple adjacent `@return`. This results in multiple `Return` sections in the
generated document, which is confusing.

This patch replaces `@return` with `@retval` for the lists of return
values. Adjacent `@retval` can be joined into one list by breathe.

v1 -> v2:

* Replace return value descriptions like `negative` and `positive` with
  expressions like `<0` and `>0` in `@retval`.
* Keep the list of `@retval` comprehensive, even when there is a `@return` to
  generally describe what the return value means.
* Drop duplicated `@return` when it does not give more information than the
  `@retval` list.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00