Commit Graph

9 Commits

Author SHA1 Message Date
Chenli Wei 7ae785a452 misc: refine the allocate logic of offline tool
The current code use VM number to calculate HV_RAM_SIZE, this is not
match the HV logic.

This patch use the max number of trusty VMs to calculate the size of
sworld memory and assume 4M ram / VM to calculate the final ACRN ram
size.

Tracked-On: #6690
Signed-off-by: Chenli Wei <chenli.wei@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2022-10-19 15:58:25 +08:00
Ziheng Li eb8bcb06b3 Update copyright year range in code headers
Modified the copyright year range in code, and corrected "int32_tel"
into "Intel" in two "hypervisor/include/debug/profiling.h" and
"hypervisor/include/debug/profiling_internal.h".

Tracked-On: #7559
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
2022-07-15 11:48:35 +08:00
Chenli Wei 4c56fa8ddb misc: modify the HV start address
The current code use a start address and hv_ram_size to find the start
address of acrn.bin, the start address is 32M which leaving too much
memory and will be load modules by grub, sometimes these modules will
override the HV log region.

This patch set the start address to 4M to avoid the above issue as much
as possible.

This algorithm depend on the board info, so the board XML should be
generate again if user change the SSRAM.

Tracked-On: #6690
Signed-off-by: Chenli Wei <chenli.wei@linux.intel.com>
2022-06-29 13:53:42 +08:00
Chenli Wei 747b32ef5d misc: modify the logic of generate HV_RAM_START
The current code assume that there must be an HV_RAM_START element in
the scenario and we will generate it if user have not set, the default
value of HV_RAM_START is 0x00400000 which cause an overlap issue.

This patch remove the requires of HV_RAM_START element, calculate
HV_RAM_SIZE and find a region of e820 to run the ACRN which start
address will be HV_RAM_START.

It is still valid if the user set HV_RAM_START by XMLs.

Tracked-On: #6690
Signed-off-by: Chenli Wei <chenli.wei@intel.com>
2022-06-29 13:53:42 +08:00
Kunhui-Li 66bbf6f751 config_tools: remove HV_RAM_SIZE
1. remove HV_RAM_SIZE and CONFIG_HV_RAM_SIZE in the related python
code, schema and all existing scenario XMLs because PR 6664 has
changed it in HV side.
2. set HV_RAM_START default value to 2M.

Tracked-On: #6663
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
2021-10-25 15:47:24 +08:00
Yang,Yu-chu 3ed36ff02a config-tools: refine append_node and add get_node
Refine the "append_node" which can add new node with an attribute and
return the appended node.

The method "get_node" finds the xpath value and return it if there is an
unique node exists, otherwise it returns None.
It is used to get an xpath element node or can determine the xpath existence.

The "get_text" is replaced with "get_node". The only get_text in
hv_ram.py is modified accordingly.

Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2021-05-07 14:39:08 +08:00
Shuang Zheng b96d23a68f config_tools: update IVSHMEM_SHM_SIZE part for HV_RAM_SIZE calculation
add 2 * max (IVSHMEM_SHM_SIZE, 2M) in HV_RAM_SIZE calculation to
avoid ram overflow caused by additional memory usage for shared
memory alignment.

Tracked-On: #5955

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2021-04-23 11:23:55 +08:00
Shuang Zheng fee0025db8 config_tools: update HV_RAM_SIZE calculation algorithm
update HV_RAM_SIZE calculation algorithm to 20MB + VM number*
16MB, which consists of text segment rodata(2MB), bss data(about
1MB), bss.ppt_pages(2.4MB), bss.ctx_tables(6MB), bss.vm_array(
3.2MB), bss.ivshmem_base(2MB+1.8MB for alignment) and
bss.post_uos_sworld_memory(16MB*post-launched VM number).

Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2021-04-19 14:45:10 +08:00
Xie, nanlin 97c9b24030 acrn-config: Reorg config tool folder
Remove vm_configs folder and move all the XML files and generic code example into config_tools/data

Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
2021-01-27 11:08:28 +08:00