Commit Graph

124 Commits

Author SHA1 Message Date
Mingqiang Chi cc2c0c3a9a hv:Move several inline APIs from vm.h to *.c
-- move vm_pic() from vm.h to vpic.c since it is
   only used in vpic.c
-- move vm_ioapic() from vm.h to vioapic.c
   change vioapic_reset(struct acrn_vioapic *vioapic) -->
          vioapic_reset(struct acrn_vm *vm)
   then vm_vioapic() is only used in vioapic.c
-- move vm_vuart() from vm.h to vuart.c,
   now this api is used in vuart.c and shell.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-29 11:29:59 +08:00
Sainath Grandhi 6d5456a0df hv: Bit Representation for IOAPIC RTE
As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Sainath Grandhi 7d57eb056e hv: Add bit representation for MSI addr and data
As we enable Interrupt Remapping, bit positions in MSI address and
data registers have a different syntax for programming. This patch adds
bit granularity for MSI address and data structs.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Shiqing Gao 5e94788689 hv: vlapic: remove `calcvdest`
- remove `calcvdest` and use `vlapic_calcdest` directly

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-23 13:43:09 +08:00
Victor Sun 253b25937b HV: remove vm_config pointer in acrn_vm struct
For each vm_array[] item, its config is located in corresponding
index of vm_configs[], so vm_config pointer is not needed any more.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun 7bf9b1be2c HV: enable pcpu bitmap config for partition mode
All the legacy cpu configration in vm_description.c are all cleaned up;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun 49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Yan, Like 6641bc7949 hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove
the MACRO definition and its related logic, including following functions:
- apicv_batch_set_tmr()
- vlapic_apicv_batch_set_tmr()
- vlapic_set_tmr_one_vec()
- vioapic_update_tmr()

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like fc61536b07 hv: rework EOI_EXIT_BITMAP update logic
This commit changes the EOI_EXIT_BITMAP as follows:
- add a eoi_exit_bitmap to vlapic structure;
- go through all the RTEs and set eoi_exit_bitmap in the vlapic structure when related RTE fields are modified;
- add ACRN_REQUEST_EOI_EXIT_UPDATE, if eoi_exit_bitmap changed, request the corresponding vcpu to write the bitmap
  to VMCS.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Zide Chen 3a5b5b084f hv: fix MISRA-C violations in vpic.c and vioapic.c
120D: Pointer param should be declared pointer to const.
  add 'const' qualifier to function signatures when it's possible.
  - vioapic_set_irqline_nolock()
  - vioapic_set_irqline_lock()
  - master_pic()
  - vpic_ocw2()
  - vpic_ocw3()
  - vpic_set_irqline()
  - vpic_get_irqline_trigger_mode()
  - vm_pic()
  - vm_ioapic

93S: Value is not of appropriate type.
  change '0' to '0U' in function vpic_icw1().

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 23:04:54 +08:00
Zide Chen 12211fb67b hv: fix MISRA-C violations in dm/vpci
120D: Pointer param should be declared pointer to const.
  Add 'const' qualifier to function parameters whenever it's possible:
    alloc_pci_vdev()
    enumerate_pci_dev()
    pci_scan_bus()
    pci_enumeration_cb()
    partition_mode_vpci_init()
    partition_mode_vpci_deinit()
    sharing_mode_vpci_init()
    sharing_mode_vpci_deinit()
    vpci_cleanup()

45D: Pointer not checked for null before use.
  Check pointer vm in vpci_reset_ptdev_intr_info() before using it.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-11 14:28:45 +08:00
Victor Sun 8ad48ff488 HV: refine vmptable for partition mode
Merge separated mptable.c of BOARDs to unified vmptable.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 10:55:14 +08:00
Mingqiang Chi 1fc10d514c hv:Unify the MACRO name for invalid interrupt pin
There are the following definitions in hypervisor,
  define IOAPIC_INVALID_PIN      0xffU
  define VPIC_INVALID_PIN        0xffU
  define PTDEV_INVALID_PIN       0xffU
this patch unify them to:
  define INVALID_INTERRUPT_PIN   0xffffffffU

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 87afe65f86 hv: vioapici: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 50deda8819 hv: vpic: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Li, Fei1 1bc90293be hv: coding style: refine functions under dm/ to one exit point
Refine vioapic_indirect_write and vmsix_table_rw to one exit point.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-09 15:58:24 +08:00
Shiqing Gao 2756ec740d hv: move `dm/hw/pci.c` to `hw/pci.c`
This patch moves `dm/hw/pci.c` to `hw/pci.c`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:45:52 +08:00
Mingqiang Chi 7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Shiqing Gao 272439d37f hv: rename register_io_emulation_handler
This patch renames `register_io_emulation_handler` to
`register_pio_emulation_handler`.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 11:28:13 +08:00
Zide Chen d133f95d97 hv: fix MISRA-C violations "Pointer param should be declared pointer to const."
MIRSA-C requires the const qualifier should be applied to pointer parameters
that address data not subject to change in rule 120D.

Tracked-On #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:03:03 +08:00
Zide Chen 927c5172fa hv: vpci: fix MISRA-C violations related to variable declarations
78D: Global variable should be declared const.

Global variables should be declared constant wherever possible to
avoid unintentional modification.

27D: Variable should be declared static
  pci_ops_vdev_msi is not accessed by other files. Remove the declaration
  from the header and define it with the static qualifier; Because it's
  referenced by populate_msi_struct(), so move the define statements forward.

33D: No real declaration for external variable
  certain variables are available in sharing mode or partition mode only,
  so that the declarations in header files must be enclosed with
  CONFIG_PARTITION_MODE

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 09:21:24 +08:00
Zide Chen 4c28e98dc4 hv: refine a few functions to only one exit point
IEC 61508,ISO 26262 standards highly recommend single-exit rule.
7C: Procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 09:17:30 +08:00
Zide Chen 3515ca1e65 hv: vpci: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 16:29:53 +08:00
Zide Chen 2028034151 hv: MISRA-C fix "identifier reuse" in vpci code
13X: Identifier reuse: tag vs component.
A tag name shall be a unique identifier

Change the following names:
  struct msi --> struct pci_msi
  struct msix --> struct pci_msix
  struct vpci --> struct acrn_vpci
  union cfgdata -> union pci_cfgdata

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 13:39:15 +08:00
Zide Chen a3d2a7e726 hv: vpci: 2 MISRA-C violation fixes
36D Prototype and definition name mismatch
  pci_scan_bus() and sharing_mode_find_vdev() wrong parameter in prototype.
14D Attempt to change parameter passed by value.
  vmsix_table_rw() uses function parameter as local viarable.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-16 14:52:44 +08:00
Yonghua Huang 4fc5dcfc3e hv: enable SMAP in hypervisor
With SMAP enabled, hypervisor can't access pages that
owned by guest(either SOS or UOS), and an override is
is provided: stac()/clac() to enable/disable access to
guest's memory pages.

 Pre-conditon:
    Mark hypervisor owned pages as supervisor mode (U/S = 0),
       and set all othter memory pages as user mode (U/S = 1).

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Li, Fei1 e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1 d36b44f23d hv: avoid to use "++" or "--" operators in an expression
Use these operators in an expression is considered dangerous.
So avoid to use it in an expression which is not in stand-alone
expressions and the 3rd expression of a for loop.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 16:39:58 +08:00
Shiqing Gao f73cf21187 hv: fix 'Unused procedure parameter'
remove the unused procedure parameter

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 18:28:32 +08:00
Shiqing Gao 11102cfa45 hv: change the param type of mmio_write**
Input parameter of mmio_write64/mmio_write32/mmio_write16/mmio_write8
should be 'void *addr' rather than 'const void *addr' since the object
pointed by 'addr' is modified in these operations.

This patch change the param type of mmio_write** and update its usage
accordingly.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-04 09:10:54 +08:00
Minggui Cao db4254e2df HV: find and hide serial PCI dev from service OS
serial PCI device is just used for HV/SOS output debug information;
because it is used in hypervisor layer, SOS should not touch it.
so need to check and hide it from SOS.

Tracked-On: #1923
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 13:20:35 +08:00
Shiqing Gao e1564edda5 hv: fix type conversion violations
This patch fixes the following violations:
 1. Implicit conversion: actual to formal param
 2. Value is not of appropriate type
 3. No cast for widening complex int expression
 4. Widening cast on complex integer expression
 5. Narrower int conversion without cast.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-30 18:14:59 +08:00
Junjie Mao 97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Binbin Wu 7003afbe74 hv: msix: fix bug when check if msix table access
The offset calculation should base on the MSI-x BAR address, not MSIX-table address.

Tracked-On: #1946
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 14:42:10 +08:00
Mingqiang Chi 5dcfc1336b hv:Rename ptdev to ptirq for some APIs
-- Rename the fowllowing APIs:
  ptdev_intx_pin_remap --> ptirq_intx_pin_remap
  ptdev_msix_remap  --> ptirq_msix_remap
  ptdev_add_intx_remapping --> ptirq_add_intx_remapping
  ptdev_remove_intx_remapping --> ptirq_remove_intx_remapping
  ptdev_add_msix_remapping --> ptirq_add_msix_remapping
  ptdev_remove_msix_remapping --> ptirq_remove_msix_remapping
  ptdev_intx_ack  --> ptirq_intx_ack
  ptdev_lookup_entry_by_sid --> ptirq_lookup_entry_by_sid
  ptdev_lookup_entry_by_vpin --> ptirq_lookup_entry_by_vpin
  ptdev_build_physical_msi --> ptirq_build_physical_msi
  ptdev_build_physical_rte --> ptirq_build_physical_rte
  alloc_entry   --> ptirq_alloc_entry
  release_entry --> ptirq_release_one_entry
  ptdev_activate_entry --> ptirq_activate_entry
  ptdev_deactivate_entry --> ptirq_deactivate_entry
  ptdev_intr_handle_irq --> ptirq_handle_intx
  ptdev_softirq --> ptirq_softirq
  ptdev_enqueue_softirq --> ptirq_enqueue_softirq
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  get_vm_ptdev_intr_data --> ptirq_get_intr_data
  alloc_ptdev_entry_id --> ptirq_alloc_entry_id
  ptdev_intr_delay_callback --> ptirq_intr_delay_callback
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  ptdev_interrupt_handler --> ptirq_interrupt_handler

-- Merge 'ptdev_release_all_entries' and 'release_all_entries'
   to 'ptirq_release_all_entries'

v2-->v3:
   Rename ptirq_release_one_entry to ptirq_release_entry
v1-->v2:
   still use ptdev_init instead of ptirq_init

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Mingqiang Chi 5b43aa8a65 hv:Rename ptdev to ptirq for some variables and structures
ptdev_remapping_info --> ptirq_remapping_info
ptdev_msi_info --> ptirq_msi_info
ptdev_vpin_source --> ptirq_vpin_source
ptdev_irq_entries --> ptirq_entries
ptdev_entry_bitmaps --> ptirq_entry_bitmaps

v1-->v2:
   still use ptdev_lock instead of ptirq_lock
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Huihuang Shi 667e0444a9 hv: vpic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi 8dfb9bd9c0 hv: dm: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    make the return value match to int32_t

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi 5b6c611a1d hv: msix: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

V1->V2:
  remove the unrelated code.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:34:12 +08:00
Shiqing Gao f21e36f43b hv: vioapic: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Mingqiang Chi 538ba08c2b hv:Add vpin to ptdev entry mapping for vpic/vioapic
Now if the vmexit reason is virtulized EOI for level triggered
interrupts, HV will loop all the ptdev entries, it is time-consuming,
this patch add vpin to ptdev entry mapping for vpic and vioapic
when add intx entry for a vm,it can use the ptdev entry directly
according to the mapping for vpin and ptdev entry when EOI vmexit.

v3-->v4:
  -- add check vpin in remove_intx_remapping
  -- move check vpin from ptdev_add_intx_remapping to add_intx_remapping

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Zide Chen 3b24c34cbf hv: msix: corrently determine when the guest is changing Message Data/Addr
The guest could write the MSI-X Table fields in DWORD or QWORD. For
example the Message Address could be a QWORD write or two DWORD writes,
the Message Data could be a DWORD write or part of a QWORD write that
is combined with the Vector Control. This patch captures all the
possible combinations when the guest is configuring the MSI-X Table.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Zide Chen c41c0dab08 hv: properly initialize MSI-X table
Though guests are not supposed to read Message Data/Addr, it's still better
off to initialize them to 0.

vector_control should be initialize to zero besides the mask bit.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Zide Chen 53971e1974 hv: fix 2 bugs in msix.c
- in vmsix_cfgwrite(), it should write the new value 'val'.
- in vmsix_table_mmio_access_handler(), mmio_gpa is a typo for intercepted_gpa.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Zide Chen 5d013ed2ba hv: vpci: revert the temporary workaround of handling I/O port CF9
Revert the temporary workaround of calling allow_guest_pio_access() to
reset the I/O bitmap for CF9.

For CONFIG_ADDR register, only intercept I/O port CF8 to achieve these:

- In SOS, I/O bitmap for port CF9 is not set.
- In UOS or in partition mode, I/O requests to CF9/CFA/CFB won't be handled
  by pci_cfgaddr_io_read/write() any more.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Zide Chen fe9a340ea9 hv: separate the PCI CONFIG_ADDR and CONFIG_DATA I/O port handlers
Register separate I/O emulation handlers for I/O port CF8 and CFC. This
makes the code simpler, and offers some flexibilities to be able to handle
CF8 and CFC ports differently.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Shiqing Gao 6971cc832a hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- instr_check_gva
- vlapic_set_local_intr
- prepare_vm
- enter_s3
- emulate_instruction
- ptdev_intx_pin_remap
- register_mmio_emulation_handler

v1 -> v2:
 * discard the return value of enter_s3

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-15 10:54:42 +08:00
Zide Chen a646fcf761 hv: fix 'No brackets to then/else' in vpci code
This patch addes missing brackets for 'if/else' statements based on
MISRA-C requirements 12 S.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
2018-11-15 08:58:32 +08:00