According to PCI spec 3.0 section 6.2.2 "Device Control", guest
could write the command register to control device response to
io/mem access.
The origial code register/unregister the memory range which is
not suitable because it can't handle the sequence:
1. disble the device response to specific memory range
2. reboot guest (DM will try to free the memory range which
was freed in step 1 already)
Tracked-On: #1277
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
- UOS will boot fail if 'strictio' is enabled ('-e' option), in this
case (with '-e'), device model will block all PIO accesses whose
handlers were not registered, after that, device model program will
exit, hence UOS boot fail.
actually, such kind of accesses exist, e.g. UOS would program
PIT registers (port address: 0x43) if hpet is disabled.
- For debug, we can trap unexpected PIO access in 'default_inout()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Yin Fengwei