Input parameter "bus" of assign_iommu_device/unassign_iommu_device may be from hypercall.
And the conext tables are static allocated according to CONFIG_IOMMU_BUS_NUM.
Need to check the bus value to avoid access invalid memory address with invalid value.
Tracked-On: #2743
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Export the following functions as global instead of static so that they can be
called/referred outside of the files where they are declared:
vdev_pt_init
vdev_pt_deinit
vdev_pt_cfgread
vdev_pt_cfgwrite
vdev_hostbridge_init
vdev_hostbridge_deinit
vdev_hostbridge_cfgread
vdev_hostbridge_cfgwrite
This is in preparation for removal of the partition modes vdev ops, and call them
directly instead.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Export the following functions as global instead of static so that they can be
called/referred outside of the files where they are declared:
vmsi_init
vmsi_cfgread
vmsi_cfgwrite
vmsi_deinit
vmsix_init
vmsix_cfgread
vmsix_cfgwrite
vmsix_deinit
This is in preparation for removal of the sharing modes vdev ops, and call them
directly instead.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Remove the populate_msi_struct() function, put msi initialization specific
functionality into msi.x, and put msix initialization specific functionality
into msix.c
Rename mmio_hva to mmio_hpa and change related code to fix misra c violation:
Cast from pointer to integral type. : (void* to unsigned long): ( uint64_t ) hpa2hva ( bar -> base )
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In order to remove the usage of hypervisor.h,
modularize the boot folder.
Current changes include modifications to remove
usage of acrn_vm structure pointer, from some of
the call, and remove calls to hypervisor.h,
as and when deemed fit.
Removed hva2gpa, as this was not used anywhere else
after the changes.
Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
move instr_emul_ctxt instance from struct per_cpu_region
to struct vcpu, and rename it from g_inst_ctxt to inst_ctxt
Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
now the 'cpu_mode' is unused in struct vm_guest_paging,
and there is the same variable in struct acrn_vcpu_arch
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ACRN now has unified the way to handle SBL and UEFI.
so just remove corresponding macros in Kconfig.
BTW, default configuration in Kconfig is for UEFI boards.
Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch mainly unifies init_vm_boot_info's implementation between SBL and
UEFI.
Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch unifies the bsp interface between UEFI and SBL.
Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
detect_apicv_cap should used to detect all the APICv capabilities. Besides,
"Virtualize x2APIC mode" doesn't depend on "APIC-register virtualization".
We shouldn't check "Virtualize x2APIC mode" support only when physical platform
supports "APIC-register virtualization"
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Add two functions to combine constraint for APICv:
is_apicv_basic_feature_supported: check the physical platform whether support
"Use TPR shadow", "Virtualize APIC accesses" and "Virtualize x2APIC mode"
is_apicv_advanced_feature_supported: check the physical platform whether support
"APIC-register virtualization", "Virtual-interrupt delivery" and
"Process posted interrupts".
If the physical platform only support APICv basic feature, enable "Use TPR shadow"
and "Virtualize APIC accesses" for xAPIC mode; enable "Use TPR shadow" and
"Virtualize x2APIC mode" for x2APIC. Otherwise, if the physical platform support
APICv advanced feature, enable APICv feature for xAPIC mode and x2APIC mode.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Accessing memory of guest will cause page fault when SMAP is enabled.
This patch stac()/clac() correspondingly to get rid of this situation.
Tracked-On: #2713
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Assert that PCI devices discovered while booting the hypervisor do not
have more table entries than allowed by the compile-time configuration
(CONFIG_MAX_MSIX_TABLE_NUM).
The case were `msix.table_count` > `CONFIG_MAX_MSIX_TABLE_NUM` is fatal
since the init function in the handler for MSI-X (vmsix_init) only looks
at `table_count` when populating the table. Since
`CONFIG_MAX_MSIX_TABLE_NUM` is the max size of the table array entry in
the pci_msix struct. This will cause the msix handler to write outside of
the table array.
Tracked-On: #2624
Signed-off-by: Viktor Sjölind <vsjolind@luxoft.com>
Except for few translation structures in x86 IOMMU, all translation
structures are 128-bit. All the translation structures used by ACRN
are 128 bit. So removed multiple definitions and defined a struct
that accomodates 128 bit entries.
Tracked-On: #2668
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
In partition mode, unassign_iommu_device() is called from vpci_cleanup(),
so when shutdown_vm() is called, unassign_iommu_device() could fail because
of "domain id mismatch" and DMAR is not cleared.
Also move destroy_ept() after the call to destroy_iommu_domain().
Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Previous change 'HV: modularization vm config code', commit id
1bb15c64a6, lost CAT code when move
sanitize_vm_config() from vm.c to vm_config.c
Tracked-On: #2291
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
platform_acpi_info.h should be BOARD specific so move the header file
to configs/$(CONFIG_BOARD)/ folder.
So the target acpi info file detect process is:
Compiler search for $(CONFIG_BOARD)_acpi_info.h under
hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be
generated by offline tool so it is not included in original source), if
found, then the file is the target acpi info file. If not and at the
same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler
will stop and hint user to add target acpi info file by offline tool.
If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to
search for platform_acpi_info.h as target acpi info file under
hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass
ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this
file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h
will be included as final target acpi info.
The process should work for UEFI path also, with a valid platform acpi
info file, S3/S5 should work on UEFI platform.
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
-- change 'tsc_khz' to static
-- move these APIs from rtl.h to timer.c
us_to_ticks()
ticks_to_us()
ticks_to_ms()
rdtsc()
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
to validate the ID and state of vCPU in below functions:
- hcall_set_vcpu_regs()
- hcall_notify_ioreq_finish()
- shell_vcpu_dumpreq()
Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
change the config type of COM_IRQ from "hex" to "int"; make
it consistent with its default value.
Tracked-On: #2689
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This commit extracts the common logic of vlapic_calc_dest() and vlapic_calc_dest_lapic_pt()
to static inline functions, in order to make vlapic_calc_dest() clean and easy to read.
Tracked-On: #1842
Signed-off-by: Yan, Like <like.yan@intel.com>
We could simple the vector check for LVT IRQ by move this check to
vlapic_fire_lvt when the IRQ is fixed mode.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Set when the local APIC detects an illegal vector (one in the range 0 to 15)
in the message that it is sending. This occurs as the result of a write to the
ICR (in both xAPIC and x2APIC modes) or to SELF IPI register (x2APIC mode only)
with an illegal vector.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
LVT ERROR is an edge and fixed mode interrupt. We could call vlapic_accept_intr
to fire it directly. Otherwise, if LVT ERR vector is invalid, an invalid
interrupt will be accepted in IRR.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Currently for pre-launched VMs, HV intends to do EPT mapping for all GPA
space, which implies that it wastes HPA to back PCI hole and other vE820
entries that are not backed by physical memory.
This patch solves this issue and fixes ve820 entries whose length is not
aligned to 4K, and changes the lowmem entry's start GPA from 1MB to 2MB.
Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This patch simplifies `get_primary_vcpu` and `vcpu_from_vid`.
The target_vcpu could be get from the index directly.
Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Correct wrong use of vector where lvt_index should be used.
Tracked-On: #1842
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
ECS.bit31 is not used and always return 0 in SDM Vol.2A 3-195. It's a
standard way to indicate whether there is a hypervisor.
Tracked-On: #2490
Ref: https://lwn.net/Articles/301888/
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
vcpu returned by get_primary_vcpu API is BSP vcpu of the VM. So
checking is_vcpu_bsp on vcpu is redundant.
Tracked-On: #2668
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
get_dmar_info API is called from multiple functions in vtd.c. This patch
calls get_dmar_info once during init and uses the cached info during
runtime.
Tracked-On: #2657
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
move 'init_iommu()' & 'ptdev_init()' before starting
all secondary cores to avoid access uninitialized resource
in partition mode.
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Both sharing mode and parittioin mode code can use the pci_find_vdev_by_pbdf
and pci_find_vdev_by_vbdf functions defined in vdev.c instead,
and remove the corresponding functions in other files.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add vdev functions so they can be reused by both partition mode
and sharing mode code:
pci_find_vdev_by_vbdf: search for vdev by virtual bdf
pci_find_vdev_by_pbdf: search for vdev by physical bdf
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
core.c contains functions all related to pci vdev management, so it makes sense
to give it a more meaningful file name.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Sharing mode has its own static global variables to store
number of vdevs and vdev list, we already have the per vpci pci_vdev[]
in struct acrn_vpci, so use the vpci_vdev in acrn_vpci instead to unify
the vdev list management for both sharing mode and partition mode.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
pci_vdevs is vpci stuff so it would be better to make it managed by vpci rather than by vm.h,
both sharing mode and partition mode can use pci_vdevs[] to maintain its own
per vm vdev list.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- merge sharing_config.c and partition_config.c to vm_config.c;
- make vm_configs[] static;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- Do not refer vm_configs[] directly in vm module;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- move sanitize_vm_config() from vm.c to vm_config.c;
- move get_vm_config() from vm.h to vm_config.h;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Enlarge hypervisor BSS section to support EPT mapping of additional
1G address space. This is used to support 64bit PCI bar whose address
is strictly above 4G.
Tracked-On: #2577
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
it removes hypervisor.h and just includes needed header files.
Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
it removes hypervisor.h and just includes needed header files.
Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
When CAT is supported, UOS can setup acrn_vm_config.clos, to use CAT
feature. Eg.,
struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
{
.guest_flags |= CLOS_REQUIRED,
.clos = 1,
},
};
sanitize_vm_config() will check if CAT is supported and
vm_configs.clos is valid.
Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Enumarate capability of Cache Allocation Technology(CAT) on X86 platform,
when HV init the primary cpu. If CAT is supported, store its info
to global struct cat_hw_info.
Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
IF CAT is supported, and we want setup initial values to
IA32_Type_MASK_n MSRs, We can define a global structure
platform_clos_array[PLATFORM_CLOS_NUM], it has 2 members:
1.msr_index, the MSR address of IA32_Type_MASK_n
2.clos_masky, the initial valuses
Global varible platform_clos_num is the number of IA32_Type_MASK_n,
from IA32_Type_MASK_0 to IA32_Type_MASK_<CLOS_MAX_NUM - 1>
Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Binbin Wu