Add xmls/samples folders under misc/vm_configs, and make soft link for
them.
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Refine cpu affinity in hybrid rt xmls for whl-ipc-i5/7
2.Refine guest flag for hybrid rt xmls for whl-ipc-i5/7
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Add UUID for Pre-launched RT VM.
2.Add hybrid_rt.xml for whl-ipc-i7/i5 and also add template Pre-Launched
RT sample xml.
3.Refine sanity check for load_kern_addr/entry.
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add tsn devices and the NVME device in the board xml
Tracked-On: #4831
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Config tool should keep aligning with Kconfig default value for
MAX_MSIX_TABLE_NUM.
Note: Remain the same configuration for the board which does not have
PCIe slot or NVME slot.
Tracked-On: #4994
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
1.add max MSI-X table number in board xmls.
2.leave MAX_MSIX_TABLE_NUM item to blank.
Tracked-On: #4994
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Update passtrough device config for ehl-crb-b launch xmls.
Tracked-On: #5016
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add support 6 VMs for ehl-crb-b industry xml.
Tracked-On: #5015
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
MBA_DELAY/CLOS_MASK show be exposed only if "MBA"/"L2" or "L3" existed
in rdt resource supoorted in board xml;
The default value of MBA_DELAY is 0;
The numbers of MAB_DELAY/CLOS_MASK entries is determined by:
If CDP is not enabled, the number of entries for CLOS_MASK and MBA_DELAY
is the min of CLOS_MAX of all RDT resources;
If CDP is enabled, divide the CLOS_MAX values for L3 and L2 resources
by 2 and then find the min of all RDT resources to get common_clos_max,
the number of entries for CLOS_MASK is common_clos_max*2,
the number of entries for MBA_DELAY is comm_clos_max.
Tracked-On: #4943
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
There are three TSN devices on EHL CRB, and each of them need 32
vectors.
In order to support TSN devices, increase msix table size and irte
size.
Tracked-On: #4831
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
refine sanity check for MASK_CLOS number by max clos in board xml.
Tracked-On: #4876
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Refinement GVT args for SOS kernel cmdline in scenario config xmls.
2.Refinement GVT args for launch UOS script in launch config xmls.
Tracked-On: #4869
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Update efi bootloader image file path for Yocto rootfs.
2.Remove empty check for UEFI OS loader name.
Tracked-On: #4868
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Update mrb ttys, up2 iomem and ehl-crb-b information.
Tracked-On: #4862
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Add RDT feature in scenario xmls, add set RDT_ENABLED=y, CDP_ENABLED=n
by default for industry scenario if HW support RDT.
2.Add CLOS_MASK in xmls to configurable and set them to '0xff' by
default if HW support RDT.
3.Remove configurable="0" of clos for PRE launched VM and POST VM, currently,
remain configurable="0" for SOS VM.
4.Add vcpu_clos to match the pcpu_id number, and set vcpu_clos to 0.
Tracked-On: #4860
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch adds xml file, both board as well scenario files
that are need to run ACRN on top of QEMU as a nested hypervisor.
Currently support is only for SDC scenario.
Tracked-On: #3198
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Remove pre-launched VM console setting in scenario xml and leave it
configured in bootargs directly.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The bootarg of rootfs for pre-launched VM is for Linux only and it
should not limited to physical block device which is selectable from
native rootfs list, it might be a USB or RAM device that "X" is variable
in root=/dev/sdX or /dev/ramX. So remove the rootfs setting in XML and
leave it configured in kernel bootargs directly.
Given the SOS must be Linux and its rootfs must be a physical block
device, rootfs item tag is still reserved in xml for SOS VM section.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
remove configurable="0" for hybrid scenario pci_devs of Pre Launched VM.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add board xml and default scenario config xmls and launch config
xmls for ElkhartLake boards.
Tracked-On: #4798
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Remove "idle=halt" from SOS boot args since the param could be handled
automatically by acrn-config according to CPU scheduler setting.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
If HV relocation is enabled, either ACRN efi-stub or GRUB relocates
hypervisor image above HPA 256MB, thus we put hvlog and ramoops buffer
under 256MB to avoid conflict with hypervisor owned address.
This patch hardcodes these addresses:
0xa00000 - 0xdfffff: 4MiB for ramoops buffer
0xe00000 - 0xffffff: 2MiB for hvlog buffer
However, user can customize them to other addresses as long as it's under
256MB, available in host e820, and SOS bootarg "nokaslr" is not specified.
If HV relocation is disabled, need to make sure that these buffer
addresses are not between HV_RAM_START and HV_RAM_START + HV_RAM_SIZE.
Tracked-On: #4760
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
enable gvtd for waag of nuc7/nuc6 board by default.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
For nuc7/nuc6/whl-ipci5/whl-ipc-i7 board, add 4 POST_STD_VM and 1
KATA_VM in their industry config xmls, and assign PCPU0-1 to these
PRE_LAUNCHED_VM.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Parse KATA VM count number from scenario config with vm_type 'KATA_VM'
and Remove MAX_KATA_VM_NUM from scenario config xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
remove configurable="0" for pci_devs of pre-launched VM so that the
passthru devices could be configurable on webUI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
1.Remove cpu_sharing item from launch config xml.
2.Add cpu_affinity for launch config xmls to configurable POST VM cpu
affinity from webUI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Change the tag name from "vcpu_affinity" to 'cpu_affinity" in all the per
board scenario xml files, and change the descritpions.
Tracked-On: #4641
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When dynamically creating or adding or deleting VMs, acrn config app
will assign VM IDs for the VMs with the orders of prelaunched VMs and SOS
VM and postlaunched VMs to be consistent with the VM order of vm_configs
in vm configuration. When dynamically creating launch scripts, acrn
config app will let users to specify the VM ID before launch setting.
Tracked-On: #4641
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Refine some items for configuarable="0"
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Remove sdc2 scenario since the VM launch requirement under this scenario
will be satisfied by industry scenario.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Leave HV_RAM_SIZE/HV_RAM_START default to blank, and config tool would
generate for them, otherwise, they would be set by the UI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. Set default value for HV template.
2. Refine vuartx in template vm setting xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. modify epc_section to configurable="0".
2. add 'idle=halt' for sos bootargs to impove performance.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
UI got syntax warning while loading new logical partitons xml, add
missed '</clos>' for it.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The patch enables CPU sharing feature by default, the default scheduler is
set to SCHED_BVT;
Tracked-On: #4661
Signed-off-by: Victor Sun <victor.sun@intel.com>
The template xmls are used to be the dafault VM settings for dynamically
adding VMs.
Tracked-On: #4641
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Use vm_type to instead combination of load_type/uuid/severity in config
xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Add pass-thru PCI device for pre launched vm section in config xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Wei Liu