Commit Graph

288 Commits

Author SHA1 Message Date
Arindam Roy de8d85753e HV: Modularize vtd.c to remove acrn_vm usage
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-06 08:53:46 +08:00
Yonghua Huang c855b78230 hv:refine coding style for trusty_hypercallc.
remove some redundant code

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 15:06:05 +08:00
Victor Sun 0f745b4d15 HV: e820 refinement
- add e820 info in struct acrn_vm;

- rename rebuild_sos_vm_e820() to create_sos_vm_e820();

- add create_prelaunched_vm_e820() for partition mode;

- rename create_e820_table() to create_zeropage_e820() and merge for
  both sharing mode and partition mode;

- move create_xxx_vm_e820() to vm.c;

- move create_zeropage_e820() to vm_load.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Li, Fei1 ce19dd423e hv: vlapic: make vlapic deliver interrupt related functions more readable
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-02-02 09:31:49 +08:00
Li, Fei1 2474c60141 hv: replace improper use of panic with ASSERT
Panic should only be used when system booting. Once the system boot done,
it could never be used. While ASSERT could be used in some situations, such
as, there are some pre-assumption for some code, using ASSERT here for debug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Mingqiang Chi 615c2bf88b hv:move e820 related macro and structure to e820.h
move 'struct e820_entry' 'E820_TYPE_XXX' from mmu.h
to e820.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-30 20:43:04 +08:00
Yan, Like e2cecfb560 hv: send IPI instead of irq injection to notify vcpu with lapic pt
For VM with local apic pt for realtime scenatios, we support virtio device with PMD backend.
But we still need to inject MSI to notify the front-end, to avoid changing the front-end drivers.

Since the lapic is passed through, irq injection to vlapic won't work.
This commit fix it by sending IPI with vector need to inject.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-28 19:47:33 +08:00
Yan, Like a073ebeeca hv: extend lapic pass-through for DM launched VM
This commit extend lapic pass-through for DM launched VM, generally for hard RT scenarios.
Similar to the partition mode, the vlapic is working under the xapic mode at first, only
when x2apic mode is enabled, lapic is passed through, because the physical LAPICs are
under x2apic mode.

Main changes includes:
- add is_lapic_pt() to check if a vm is created with lapic pt or not, to combine
  codes of partition mode and DM launched vm with lapic passthrough, including:
  - reuse the irq delievery function and rename it to dispatch_interrupt_lapic_pt();
  - reuse switch_apicv_mode_x2apic();
  - reuse ICR handling codes to avoid malicious IPI;
- intercept ICR/APICID/LDR msr access when lapic_pt;
- for vm with lapic passthrough, irq is always disabled under root mode.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-28 19:47:33 +08:00
Jason Chen CJ 285b64faec replace arch_switch_to with pure asm code instead of inline asm
after compile, the compiled code could change rsp, so use pure asm code
to avoid such problem which will cause schedule switch failure.

Tracked-On: #2410
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-25 11:39:47 +08:00
Jason Chen CJ 15030f6f2c io_emul: reshuffle io emulation path
This is the following patch after removing pending_pre_work, it make sure
all io emulation is done on its own cpu.

For hv emulated request, it follows the steps:
	hv_emulate_pio->emulate_pio_complete
	hv_emulate_mmio->emulate_mmio_complete

For dm emulated request, it follows the steps:
	acrn_insert_request->dm_emulate_io_complete
while in acrn_insert_request, it could trigger scheduling out then resume by
hcall_notify_ioreq_finish, or busy wait for ioreq completion if polling mode
is enabled.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ fb41ea5cfb io_emul: remove pending_pre_work
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.

Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ 4fc54f952e schedule: add full context switch support
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.

Arch related function arch_switch_to is added for context switch.

To benefit debugging, a name[] field is also added into struct sched_object.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ 21092e6f6d schedule: use per_cpu idle object
To support full context switch scheduling, each physical
CPU must have its own idle sched_obj.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Victor Sun 2e32fba536 HV: remove sworld_supported in acrn_vm_config
We will use guest_flags of SECURE_WORLD_ENABLED to check wthether
sworld is supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun e6117e0d5b HV: refine launch vm interface
When pcpu enter guest mode, it will call launch_vms() function to launch
VMs in global vm_configs array.

In launch_vms() function, current pcpu will go through vm_config array list
and check whether it is a bsp of configured VM, if yes then it will prepare
corresponding VM and start it. The index of vm_config array will be specified
to VM id.

The first least significant bit in pcpu_bitmap means the bsp of the VM.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun 49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi de4ab6fdfa hv:modulization for IO Emulation
-- rename io.c to io_emul.c, add io_emul.h
-- rename io_request.c to io_req.c,rename ioreq.h to io_req.h
-- move some APIs declaration from ioreq.h to io_emul.h
   related IO emulation

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
	modified:   ../doc/acrn.doxyfile
	modified:   Makefile
	renamed:    arch/x86/io.c -> arch/x86/io_emul.c
	renamed:    common/io_request.c -> common/io_req.c
	modified:   include/arch/x86/hv_arch.h
	modified:   include/arch/x86/io.h
	new file:   include/arch/x86/io_emul.h
	renamed:    include/arch/x86/ioreq.h -> include/arch/x86/io_req.h
2019-01-21 13:49:54 +08:00
Minggui Cao 808d0af2c8 HV: check to avoid interrupt delay timer add twice
to edge interrupt, like eth device, it can triger the interrupt again
when its IRQ in softirq entry queue or in timer list.

in current design, for sofrirq entry, it calls "list_del" before
"list_add_tail", to avoid the entry added twice.

so for interrupt delay timer, add to check if it is started
then just drop the next one; to avoid it enqueue twice.

Tracked-On: #2365
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2019-01-21 11:18:08 +08:00
Victor Sun c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Zhao Yakui e4a3a63496 acrn/vhm: change the default notification vector to 0xF3
Currently the SOS kernel will call hcall_set_callback_vector to config
the expected up-notification vector(0xF3) and then hypervisor uses the
passed vector to raise the interrupt to SOS when needed.
As sos kernel already switches to 0xF3 notification vector, the default 
notification vector can be changed from 0xF7 to 0xF3. In such case it still
can work well even when the SOS kernel doesn't reconfigure the notification
vector. 

Tracked-On: projectacrn/acrn-hypervisor#2355 
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2019-01-18 11:04:22 +08:00
Mingqiang Chi 8265770f05 hv:Change acrn_vhm_vector to static
-- Change acrn_vhm_vector to static, only used in io_request.c
-- Add set_vhm_vector() api, it will call this api instead of
   acrn_vhm_vector except io_request.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 08:29:36 +08:00
Zhipeng Gong 7c56243225 hv: hv_main: adjust vm exit trace position
When we use script to analyze the latency between vm_exit and vm_entry,
it does not include the duration of vm_exit handler.

The patch moves the vm_exit trace before vmexit_handler.

v2: move vm_exit trace right after run_vcpu.

Tracked-On: #2341
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2019-01-16 10:24:33 +08:00
Shiqing Gao e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Huihuang Shi e966828cd2 hv: clean the "Procedure has more than one exit point".
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:47:01 +08:00
Mingqiang Chi 7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Mingqiang Chi 682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Huihuang Shi d89ce8aeb4 hv: schedule: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-12-27 13:38:41 +08:00
Shuo A Liu 952943c3ea hv: decouple IO completion polling from idle thread
IO completion polling will access vcpu and vm structs. If doing it in
idle thread, there might be some race issues between vm destroying and
idle thread. They are running on different cores.
Got suggestion from Fengwei, decouple the polling action from idle
thread and just do it in vcpu thread, then we can guarantee idle thread
in really idle status.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu a0154223f6 hv: clear NEED_RESCHEDULE flag in schedule
Now, need_reschedule will test_and_clear the bit NEED_RESCHEDULE in
schedule context, then call schedule. It is not a exact match with the
name.
This patch move the flag clearing into scheudle, and need_reschedule
just check and return.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Huihuang Shi 2d3f510dbe hv: tursty_hypercall: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:32 +08:00
Huihuang Shi 5aa7e29f0b hv: hypercall: fix "Procedure has more than one exit point"
Fix "Procedure has more than one exit point" by split the function into
two parts.
V1->V2:
    compact the multiple lines into one.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi d6a2268282 hv: hypercall: fix complicated violations of "Procedure has more than one exit point"
Fix the complicated violations by methods list below:
1.if ... else ... fmt.
2.add status in proper position.
    example:
        bool bdf_valid;(could find this variable in this patch).

V1->V2:
    merge branches.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi f680ed5d6a hv: hypercall: fix simple violations of "Procedure has more than one exit point"
This patch fix the violations by the "if ... else ..." fmt.

V1->V2:
    merge branches.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi 20d0e666ff hv: fix sprintf and hypercall violations
Fix the violations list below:
1.Procedure has more than one exit point.
2.Use of sizeof on an array parameter.
3.Expression needs brackets.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 16:33:13 +08:00
huihuang.shi 277c7ec8ba hv: hypercall: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 16:06:16 +08:00
Jason Chen CJ ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 8aae0dff87 scheduler: refine make_reschedule_request
just use pcpu_id for make_reschedule_request is enough

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Li, Fei1 1dca17cd29 hv: coding style: refine initialize_trusty to one exit
1) Move data copy out of initialize_trusty
2) Fix procedure has more than one exit point

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Li, Fei1 8a55f03823 hv: coding style: refine hcall_initialize_trusty to one exit
Fix procedure has more than one exit point.

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Huihuang Shi 1caf58f221 hv:clean io_request.c misra violations
Clean the io_request.c's violations reported by the misra tools.
V1->V2:
    remove violations which checked with NULL.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:10:02 +08:00
Binbin Wu 83ebd43239 hv: ptdev: fix MISRAC violations
This patch fixs MISRAC violations in common/ptdev.c and include/common/ptdev.h

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 09:08:57 +08:00
Mingqiang Chi 64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Yonghua Huang b8ffac8bac hv:fix possible buffer overflow in 'ptirq_get_intr_data()'
- 'buffer'with size of 'buffer_cnt',  will overflow in
    next loop if 'index == buffer_cnt - 1'.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 20:07:36 +08:00
Huihuang Shi 6aa4227277 fix "Procedure has more than one exit point."
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 20:04:20 +08:00
Jason Chen CJ d2bac7cc5d cpu_dead should only run on current pcpu
no need for input param pcpu_id.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-17 14:31:52 +08:00
Yonghua Huang 57bf26dc17 hv: fix possible buffer overflow issues
- cpu_secondary_init() @cpu.c
 - ptirq_intx_pin_remap() @ assign.c
   etc.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 20:38:15 +08:00
Yonghua Huang 4fc5dcfc3e hv: enable SMAP in hypervisor
With SMAP enabled, hypervisor can't access pages that
owned by guest(either SOS or UOS), and an override is
is provided: stac()/clac() to enable/disable access to
guest's memory pages.

 Pre-conditon:
    Mark hypervisor owned pages as supervisor mode (U/S = 0),
       and set all othter memory pages as user mode (U/S = 1).

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Yonghua Huang 57dfc7de05 hv: refine IOREQ state operation functions in hypervisor
1) add functions to set/get VHM request state.
2) modify 'complete_ioreq()' in io.c
3) update the caller code

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00