Commit Graph

40 Commits

Author SHA1 Message Date
Junjie Mao eecac5ab88 HV: make: force updating .config and config.mk
Before checking any given target, make has an additional phase to check if any
included makefile should be updated. This patch enforces running oldconfig in
this phase to update .config and config.mk (if necessary). This ensures that
make gets the correct configurations when executing the given target.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Geoffroy VanCutsem <geoffroy.vancutsem@intel.com>
2018-06-15 15:50:09 +08:00
Yin Fengwei 74dfa425e0 hv: Add initialize pm.c
Now, we only add native msr save/restore functions. The native power
related functions will be put to this file.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:45 +08:00
Victor Sun 88e1c4975c HV: add bsp acpi info support
On some occations HV operates relying on host acpi info, we can use a
c file to store this data. The data could be hardcoded or use offline
tool that run on target first and then generate the file automatically.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-13 15:02:03 +08:00
Yin Fengwei 5414d57ac4 hv: Fix typo of trampline with trampoline
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 15:54:16 +08:00
Junjie Mao c849bff850 HV: config: adapt to the generated config.h
This patch drops "#include <bsp_cfg.h>" and include the generated config.h in
CFLAGS for the configuration data.

Also make sure that all configuration data have the 'CONFIG_' prefix.

v4 -> v5:

    * No changes.

v3 -> v4:

    * Add '-include config.h' to hypervisor/bsp/uefi/efi/Makefile.
    * Update comments mentioning bsp_cfg.h.

v2 -> v3:

    * Include config.h on the command line instead of in any header or source to
      avoid including config.h multiple times.
    * Add config.h as an additional dependency for source compilation.

v1 -> v2:

    * No changes.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2018-06-08 17:21:13 +08:00
Junjie Mao f9bb2024cc HV: make: introduce targets for generating configs
This patch implements the following targets as an includable .mk to the make
system of the hypervisor.

    make defconfig PLATFORM=xx:
        force (re)generating the default configuration for xx

    make oldconfig PLATFORM=xx:
        generate a configuration for platform xx based on .config if available

    make minimalconfig
        save a minimized .config to defconfig

The default target (make all) will generate a default configuration if no
.config is available.

The values defined in .config are available in the toplevel Makefile after
kconfig/kconfig.mk is included.

v4 -> v5:

    * Add minimalconfig for generating default configs.

v3 -> v4:

    * No changes.

v2 -> v3:

    * "make defconfig" now correctly overwrite an existing .config.
    * Add short descriptions on where each target is supposed to be used.

v1 -> v2:

    * Add proper dependency checks in the Makefile of hypervisor.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2018-06-08 17:21:13 +08:00
Yin Fengwei 11df803da3 hv: rename cpu_secondary.S to trampline.S
We will reuse this part of code for:
   - AP bootup
   - BSP wakeup from S3

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-08 13:45:02 +08:00
Zide Chen c2283743f0 hv: basic MTRR virtualization
Linux commit edfe63ec97ed ("x86/mtrr: Fix Xorg crashes in Qemu sessions")
disables PAT feature if MTRR is not enabled. This patch does partial
emulation of MTRR to prevent this from happening: enable fixed-range
MTRRs and disable virable range MTRRs

By default IA32_PAT MSR (SDM Vol3 11.12.4, Table 11-12) doesn't include
'WC' type. If MTRR is disabled from the guests, Linux doesn't allow
writing IA32_PAT MSR so WC type can't be enabled. This creates some
performance issues for certian applications that rely on WC memory type.

Implementation summary:
- Enable MTRR feature: MTRRdefType.E=1
- Enable fixed range MTRRs: MTRRCAP.fix=1, MTRRdefType.FE=1
- For simplicity, disable variable range MTRRs: MTRRCAP.vcnt=0.
  It's expected that this bit is honored by the guests and they won't
  change the guest memory type through variable MTRRs.

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Qi Yadong 03f5cbdd7a HV: Parse SeedList HOB
Retrieve dseed from SeedList HOB(Hand-Off-Block).
SBL passes SeedList HOB to ACRN by MBI modules.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-07 09:55:29 +08:00
Jack Ren f2b524385a version: v0.1-rc5
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-31 07:30:24 +08:00
Miguel Bernal Marin 364b24224a hypervisor: install acrn.32.out to /usr/lib/acrn/acrn.sbl
Add a target in the make file to install the 32bit ELF acrn binary
and rename to acrn.sbl

Suggested-by: Arzhan Kinzhalin <arzhan.i.kinzhalin@intel.com>
Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
2018-05-24 19:34:49 +08:00
Yin Fengwei b22cc43f81 hv: move boot/multiboot.c to boot/sbl/multiboot.c
boot/multiboot.c is only used by SBL. So move it to boot/sbl.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-23 11:43:19 +08:00
Yin Fengwei 6ef48fa30e hv: Add reboot shell command
To trigger warm reboot for debugging.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 16:38:40 +08:00
Victor Sun 99189b4e48 HV: cleanup for io request related functions
Changes:
  1. Move io request related functions from hypercall.c to io_request.c
     since they are not hypercalls;
  2. Remove acrn_insert_request_nowait() as it is never used;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 16:36:33 +08:00
Qi Yadong b55511abd6 HV: remove tinycrypt
Remove tinycrypt files:
Currently, hkdf_sha256 (based on Tinycrypt) is used by Trusty seed
derivation. And we plan to remove Tinycrypt from ACRN hypervisor
now, and replace it with another crypto lib in the future.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 14:02:57 +08:00
Geoffroy Van Cutsem 3efef5790c Remove duplicate license file
Remove 'license_header' files that were located in hypervisor/ and
devicemodel/ and used by the respective Makefiles to build the
'include/version.h' header file.

Both Makefiles were adjusted to use the top-level LICENSE file

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-16 13:22:17 +08:00
Kaige Fu 93fda88893 lib: Move mem operations functions to one src file
Move all mem operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
funtion.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Kaige Fu 497eadcb9a lib: Move all str ops functions to one src file
Move all string operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
function.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Zhao Yakui 9efbf1212f HV: Enable the -O2 option for HV
Now the -O0 option is used. In such case the code is not optimized.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 3a9bf54d66 HV: Add gcc compiler option to disable FPU/SSE/MMX
FPU/SSE is not supported in HV. Otherwise it is possible that the
SSE/FPU register is used under -O2 option.
So the gcc option is added to disable them.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 52a91fff0d HV: Use the CFLAGS to control the optimization option
Now two flags can be used to control the optimizatin option. So unify them
and only one flag can be used to config the optimization

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Yan, Like ccc67ceae4 hv: add build type and detail time to version string
- Add "DBG" or "REL" to indicate the DBG build or REL build explicityly;
- Change the build time format to "%F %T".

Example:
HV version 0.1-rc4-2018-04-28 14:20:32-b2d7282-dirty DBG build by like

Change-Id: Ib410064b0a6603e3c90f30dffa722237c07fc069
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:57 +08:00
Victor Sun c3374a519a HV: code cleanup for cpu state
Split pm.c from cpu_state_tbl.c to put guest power management related
functions, keep cpu_state_tbl.c to store host cpu state table and
related functions.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:56 +08:00
Jack Ren f3db18b981 version: v0.1-rc4
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:25:50 +08:00
Victor Sun a28fbd15b5 HV: load cpu px data in boot
The patch takes Intel ATOM A3960 as example that hard code all Px info
which is needed for Px control into Acrn HV and load it in boot process.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:25 +08:00
Jack Ren c730806a36 version: v0.1-rc3
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:25:17 +08:00
Qi Yadong 922daae198 trusty: add key_info for trusty bring-up
For trusty bring-up, key_info is needed.
Currently, bootloader did not transfer key_info to hypervisor.
So in this patch, use dummy key_info temporarily.

Derive vSeed from dSeed before trusty startup, the vSeed will
bind with UUID of each VM.

Remove key_info from sworld_control structure.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Qi Yadong 1fd07ba349 trusty: Simulate Secure Monitor Call(SMC) by Hypercall
For ARM, The SMC instruction is used to generate a synchronous
exception that is handled by Secure Monitor code running in EL3.
In the ARM architecture, synchronous control is transferred between
the normal Non-secure state and the Secure state through Secure
Monitor Call exceptions. SMC exceptions are generated by the SMC
instruction, and handled by the Secure Monitor.The operation of
the Secure Monitor is determined by the parameters that are passed
in through registers.

For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU
State between Normal World and Secure World.
There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters
passing between Normal World and Secure World.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:38 +08:00
Tianhua Sun 9422f3e287 Makefile cleanup
replace "=" with "?=", if variable is defined, don't redefine.
replace POSTLD with OBJCOPY
fix the variable LD assignment

Signed-off-by: Tianhua Sun <tianhuax.s.sun@intel.com>
2018-05-15 17:19:38 +08:00
Yin Fengwei 4073b37369 hv: microcode: Enable microcode update from SOS.
microcode update from UOS is disabled.
microcode version checking is available for both SOS and UOS.

There are two TODOs of this patch:
1. This patch only update the uCode on pCPUs SOS owned. For the
   pCPUs not owned by SOS, the uCode is not updated. To handle
   this gap, we will have SOS own all pCPUs at boot time. So
   all pCPUs could have uCode updated. This will be handled
   in the patch to enable SOS own all pCPUs at boot time.

2. gva2gpa now doesn't check possible page table walk failure.
   Will add the failure check in gva2gpa in different patch.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Anthony Xu (anthony.xu@intel.com)
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:19:37 +08:00
Li, Fei1 ab2691de16 Don't build in debug directory for release
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:37 +08:00
Li, Fei1 36148041bc Move s[n]printf to lib for release
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:37 +08:00
Minggui Cao 119b038551 to support firmware & ramdisk as multiboot mods
1. refine multiboot related code, move to /boot.
2. firmware files and ramdisk can be stitched in iasImage;
and they will be loaded as multiboot modules.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-05-15 17:19:37 +08:00
Geoffroy Van Cutsem 2efcbe3ab8 Makefile: fix a couple of wrong variable assignments
Fix a couple of wrong assignments to D_SRCS and C_SRCS.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 17:19:36 +08:00
Mingqiang Chi c451f2e4fa add create secure world ept API
This patch is prepared for enabling secure world feature.
this api will create new eptp for secure world, whose PDPT
entries are copied form normal world,the PML4/PDPT for secure
world are separated from Normal World, PD/PT are shared in the
Secure World's EPT and Normal World's EPT.Secure world can
access Normal World's memory, but Normal World can not access
Secure World's memory
This function implemented:
-- Unmap specific memory from guest ept mapping
-- Copy PDPT from Normal world to Secure world
-- Map specific memory for Secure world
-- Unmap specific memory from SOS ept mapping

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-15 17:19:36 +08:00
Jason Chen CJ d14a7dbdd2 retpoline: add indirect thunk support
for gcc version > 7.3, enable CONFIG_RETPOLINE

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:36 +08:00
wenshelx 265499c2f2 security: fortify source and format string check
"-O2 -D_FORTIFY_SOURCE=2":
GCC C-Compiler can analyze the source code to be compiled and detect
certain insecure sections, that might create a security problem. The
compiler will replace the insecure function calls with special hardened
code that will perform extra runtime checks while the process is
executed.
"-Wformat -Wformat-security":
It warns about calls to "printf" and "scanf" functions where the format
string is not a string literal and there are no format arguments, as in
"printf (foo);". This may be a security hole if the format string came
from untrusted input and contains %n.

Tracked-On: 224003
Signed-off-by: wenshelx <wenshengx.wang@intel.com>
2018-05-15 17:19:35 +08:00
Jack Ren cf707cc62e version: v0.1-rc2
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:19:22 +08:00
Jason Chen CJ 2cb8ce50c1 decouple hv sw version and api version
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-11 14:44:29 +08:00
Eddie Dong 7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00