Commit Graph

114 Commits

Author SHA1 Message Date
Ziheng Li eb8bcb06b3 Update copyright year range in code headers
Modified the copyright year range in code, and corrected "int32_tel"
into "Intel" in two "hypervisor/include/debug/profiling.h" and
"hypervisor/include/debug/profiling_internal.h".

Tracked-On: #7559
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
2022-07-15 11:48:35 +08:00
Geoffroy Van Cutsem 8b16be9185 Remove "All rights reserved" string headers
Many of the license and Intel copyright headers include the "All rights
reserved" string. It is not relevant in the context of the BSD-3-Clause
license that the code is released under. This patch removes those strings
throughout the code (hypervisor, devicemodel and misc).

Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2022-04-06 13:21:02 +08:00
Junjie Mao 83a938bae6 HV: treewide: fix violations of coding guideline C-TY-27 & C-TY-28
The coding guideline rules C-TY-27 and C-TY-28, combined, requires that
assignment and arithmetic operations shall be applied only on operands of the
same kind. This patch either adds explicit type casts or adjust types of
variables to align the types of operands.

The only semantic change introduced by this patch is the promotion of the
second argument of set_vmcs_bit() and clear_vmcs_bit() to
uint64_t (formerly uint32_t). This avoids clear_vmcs_bit() to accidentally
clears the upper 32 bits of the requested VMCS field.

Other than that, this patch has no semantic change. Specifically this patch
is not meant to fix buggy narrowing operations, only to make these
operations explicit.

Tracked-On: #6776
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-11-04 18:15:47 +08:00
Junjie Mao 3f3f4be642 HV: treewide: fix violations of coding guideline C-EP-05
The coding guideline rule C-EP-05 requires that 'parentheses shall be used
to set the operator precedence explicitly'. This patch adds the missing
parentheses detected by the static analyzer.

Tracked-On: #6776
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-11-04 18:15:47 +08:00
Liang Yi 688a41c290 hv: mod: do not use explicit arch name when including headers
Instead of "#include <x86/foo.h>", use "#include <asm/foo.h>".

In other words, we are adopting the same practice in Linux kernel.

Tracked-On: #5920
Signed-off-by: Liang Yi <yi.liang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-05-08 11:15:46 +08:00
Liang Yi 33ef656462 hv/mod-irq: use arch specific header files
Requires explicit arch path name in the include directive.

The config scripts was also updated to reflect this change.

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi df36da1b80 hv/mod_irq: do not include x86/irq.h in common/irq.h
Each .c file includes the arch specific irq header file (with full
path) by itself if required.

Tracked-On: #5825
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi 798015876c hv/mod_irq: move NMI and exception handler out of x86/irq.c
Each of them now resides in a separate .c file.

Tracked-On: #5825

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi 3a50f949e1 hv/mod_irq: split irq.c into arch/x86/irq.c and common/irq.c
The common irq file is responsible for managing the central
irq_desc data structure and provides the following APIs for
host interrupt handling.
- init_interrupt()
- reserve_irq_num()
- request_irq()
- free_irq()
- set_irq_trigger_mode()
- do_irq()

API prototypes, constant and data structures belonging to common
interrupt handling are all moved into include/common/irq.h.

Conversely, the following arch specific APIs are added which are
called from the common code at various points:
- init_irq_descs_arch()
- setup_irqs_arch()
- init_interrupt_arch()
- free_irq_arch()
- request_irq_arch()
- pre_irq_arch()
- post_irq_arch()

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi c46e3c71ac hv/mod_irq: decouple irq number reservation from ioapic
This is done be adding irq_rsvd_bitmap as an auxiliary bitmap
besides irq_alloc_bitmap.

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi 038e0cae92 hv/mod_irq: split IRQ handling into common and arch specific parts
The common IRQ handling routine calls arch specific functions
pre_irq_arch() and post_irq_arch() before and after calling the
registered action function respectively.

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi ac3e0a1718 hv/mod_irq: split irq initialization into common and arch specific parts
The common part initializes the global irq_desc data structure while the
arch specific part initialize the HW and its own irq data.

This is one of the preparation steps for spliting IRQ handling into common
and architecture specific parts.

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Liang Yi f3cae9e258 hv/mod_irq: hide arch specific data in irq_desc
Arch specific IRQ data is now an opaque pointer in irq_desc.

This is a preparation step for spliting IRQ handling into common
and architecture specific parts.

Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-03-24 11:38:14 +08:00
Shiqing Gao 6f10bd00bf hv: coding style clean-up related to Boolean
While following two styles are both correct, the 2nd one is simpler.
	bool is_level_triggered;
	1. if (is_level_triggered == true) {...}
	2. if (is_level_triggered) {...}

This patch cleans up the style in hypervisor.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2020-11-28 14:51:32 +08:00
Zide Chen bebffb29fc hv: remove de-privilege boot mode support and remove vboot wrappers
Now ACRN supports direct boot mode, which could be SBL/ABL, or GRUB boot.
Thus the vboot wrapper layer can be removed and the direct boot functions
don't need to be wrapped in direct_boot.c:

- remove call to init_vboot(), and call e820_alloc_memory() directly at the
  time when the trampoline buffer is actually needed.
- Similarly, call CPU_IRQ_ENABLE() instead of the wrapper init_vboot_irq().
- remove get_ap_trampoline_buf(), since the existing function
  get_trampoline_start16_paddr() returns the exact same value.
- merge init_general_vm_boot_info() into init_vm_boot_info().
- remove vm_sw_loader pointer, and call direct_boot_sw_loader() directly.
- move get_rsdp_ptr() from vboot_wrapper.c to multiboot.c, and remove the
  wrapper over two boot modes.

Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
Mingqiang Chi 67a7c355ec cleanup spin lock in irq.c
-- move exception_lock to dump.c
-- optimize the lock usage in request_irq

Tracked-On: #4958
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-06-19 16:13:20 +08:00
Li Fei1 067b439e69 hv: irq: minor refine about structure idt_64_descriptor
The 'value' field in structure idt_64_descriptor is no one used. We could remove it.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-04-26 10:48:49 +08:00
dongshen 14fa9c563c hv: define posted interrupt IRQs/vectors
This is a preparation patch for adding support for VT-d PI
related vCPU scheduling.

ACRN does not support vCPU migration, one vCPU always runs on
the same pCPU, so PI's ndst is never changed after startup.

VCPUs of a VM won’t share same pCPU. So the maximum possible number
of VCPUs that can run on a pCPU is CONFIG_MAX_VM_NUM.

Allocate unique Activation Notification Vectors (ANV) for each vCPU
that belongs to the same pCPU, the ANVs need only be unique within each
pCPU, not across all vCPUs. This reduces # of pre-allocated ANVs for
posted interrupts to CONFIG_MAX_VM_NUM, and enables ACRN to avoid
switching between active and wake-up vector values in the posted
interrupt descriptor on vCPU scheduling state changes.

A total of CONFIG_MAX_VM_NUM consecutive IRQs/vectors are reserved
for posted interrupts use.

The code first initializes vcpu->arch.pid.control.bits.nv dynamically
(will be added in subsequent patch), the other code shall use
vcpu->arch.pid.control.bits.nv instead of the hard-coded notification vectors.

Rename some functions:
  apicv_post_intr --> apicv_trigger_pi_anv
  posted_intr_notification --> handle_pi_notification
  setup_posted_intr_notification --> setup_pi_notification

Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
2020-04-15 13:47:22 +08:00
Sainath Grandhi f67ac09141 hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs
MADT is used to specify the GSI base for each IO-APIC and the number of
interrupt pins per IO-APIC is programmed into Max. Redir. Entry register of
that IO-APIC.

On platforms with multiple IO-APICs, there can be holes in the GSI space.
For example, on a platform with 2 IO-APICs, the following configuration has
a hole (from 24 to 31) in the GSI space.

IO-APIC 1: GSI base - 0, number of pins - 24
IO-APIC 2: GSI base - 32, number of pins - 8

This patch also adjusts the size for variables used to represent the total
number of IO-APICs on the system from uint16_t to uint8_t as the ACPI MADT
uses only 8-bits to indicate the unique IO-APIC IDs.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Yonghua Huang 64b874ce4c hv: rename BOOT_CPU_ID to BSP_CPU_ID
1. Rename BOOT_CPU_ID to BSP_CPU_ID
  2. Repace hardcoded value with BSP_CPU_ID when
  ID of BSP is referenced.

Tracked-On: #4420
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-02-25 09:08:14 +08:00
Yonghua Huang fd4775d044 hv: rename VECTOR_XXX and XXX_IRQ Macros
1. Align the coding style for these MACROs
  2. Align the values of fixed VECTORs

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Yonghua Huang b90862921e hv: rename the ACRN_DBG_XXX
Refine this MACRO 'ACRN_DBG_XXX' to 'DBG_LEVEL_XXX'

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Kaige Fu a13909cedc HV: Use NMI-window exiting to address req missing issue
There is a window where we may miss the current request in the
notification period when the work flow is as the following:

      CPUx +                   + CPUr
           |                   |
           |                   +--+
           |                   |  | Handle pending req
           |                   <--+
           +--+                |
           |  | Set req flag   |
           <--+                |
           +------------------>---+
           |     Send NMI      |  | Handle NMI
           |                   <--+
           |                   |
           |                   |
           |                   +--> vCPU enter
           |                   |
           +                   +

So, this patch enables the NMI-window exiting to trigger the next vmexit
once there is no "virtual-NMI blocking" after vCPU enter into VMX non-root
mode. Then we can process the pending request on time.

Tracked-On: #3886
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-12-17 09:45:52 +08:00
Kaige Fu 525d4d3cd0 HV: Install a NMI handler in acrn IDT
This patch installs a NMI handler in acrn IDT to handle
NMIs out of dispatch_exception.

Tracked-On: #3886
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-12-13 10:13:09 +08:00
huihuang.shi f147c388a5 hv: fix Violations touched ACRN Coding Guidelines
fix violations touched below:
1.Cast operation on a constant value
2.signed/unsigned implicity conversion
3.return value unused.

V1->V2:
1.bitmap api will return boolean type, not need to check "!= 0", deleted.
2.The behaves ~(uint32_t)X and (uint32_t)~X are not defined in ACRN hypervisor Coding Guidelines,
removed the change of it.
Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2019-08-15 09:47:11 +08:00
Yin, Fengwei 11e67f1c4a softirq: move softirq from hv_main to interrupt context
softirq shouldn't be bounded to vcpu thread. One issue for this
is shell (based on timer) can't work if we don't start any guest.

This change also is trying best to make softirq handler running
with irq enabled.

Also update the irq disable/enabel in vmexit handler to align
with the usage in vcpu_thread.

Tracked-On: #3387
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-07-22 09:55:06 +08:00
Jason Chen CJ 41ac9e5d10 rename function & definition from firmware to guest boot
The interface struct & API changes like below:
  struct uefi_context->struct depri_boot_context
  init_firmware_operations()->init_vboot_operations()
  init_firmware()->init_vboot()
  firmware_init_irq()->init_vboot_irq()
  firmware_get_rsdp()->get_rsdp_ptr()
  firmware_get_ap_trampoline()->get_ap_trampoline_buf()
  firmware_init_vm_boot_info()->init_vm_boot_info()

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-09 16:33:44 +08:00
Jason Chen CJ 20f97f7559 restruct boot and bsp dir for firmware stuff
currently, ACRN hypervisor can either boot from sbl/abl or uefi, that's
why we have different firmware method under bsp & boot dirs.
but the fact is that we actually have two different operations based on
different guest boot mode:
1. de-privilege-boot: ACRN hypervisor will boot VM0 in the same context as
native(before entering hypervisor) - it means hypervisor will co-work with
ACRN UEFI bootloader, restore the context env and de-privilege this env
to VM0 guest.
2. direct-boot: ACRN hypervisor will directly boot different pre-launched
VM(including SOS), it will setup guest env by pre-defined configuration,
and prepare guest kernel image, ramdisk which fetch from multiboot modules.

this patch is trying to:
- rename files related with firmware, change them to guest vboot related
- restruct all guest boot stuff in boot & bsp dirs into a new boot/guest dir
- use de-privilege & direct boot to distinguish two different boot operations

this patch is pure file movement, the rename of functions based on old assumption will
be in the following patch.

Changes to be committed:
	modified:   ../efi-stub/Makefile
	modified:   ../efi-stub/boot.c
	modified:   Makefile
	modified:   arch/x86/cpu.c
	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   arch/x86/irq.c
	modified:   arch/x86/trampoline.c
	modified:   boot/acpi.c
	renamed:    bsp/cmdline.c -> boot/cmdline.c
	renamed:    bsp/firmware_uefi.c -> boot/guest/deprivilege_boot.c
	renamed:    boot/uefi/uefi_boot.c -> boot/guest/deprivilege_boot_info.c
	renamed:    bsp/firmware_sbl.c -> boot/guest/direct_boot.c
	renamed:    boot/sbl/multiboot.c -> boot/guest/direct_boot_info.c
	renamed:    bsp/firmware_wrapper.c -> boot/guest/vboot_wrapper.c
	modified:   boot/include/acpi.h
	renamed:    bsp/include/firmware_uefi.h -> boot/include/guest/deprivilege_boot.h
	renamed:    bsp/include/firmware_sbl.h -> boot/include/guest/direct_boot.h
	renamed:    bsp/include/firmware.h -> boot/include/guest/vboot.h
	modified:   include/arch/x86/multiboot.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-09 16:33:44 +08:00
Shiqing Gao 94e1e362fb hv: rename 'interrupt_init' to 'init_interrupt'
This patch renames 'interrupt_init' to 'init_interrupt'.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-06 16:58:27 +08:00
Kaige Fu a85d11ca7a HV: Add prefix 'p' before 'cpu' to physical cpu related functions
This patch adds prefix 'p' before 'cpu' to physical cpu related functions.
And there is no code logic change.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-24 10:50:28 +08:00
Sainath Grandhi f22347346e hv: Remove separate interrupt routine for pre-launched VMs
As vector re-mapping is enabled for pre-launched/partition mode VMs,
there is no more need for separate interrupt routine i.e.
partition_mode_dispatch_interrupt.

Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 17:51:36 +08:00
Tw 56d8b08b78 hv: merge SBL and UEFI related stuff under bsp
This patch unifies the bsp interface between UEFI and SBL.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Mingqiang Chi bd1e7a46b3 hv:cleanup header files for arch folder
cleanup arch folder, only include some necessary,
doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/configs/apl-mrb/pt_dev.c
	modified:   arch/x86/configs/apl-mrb/ve820.c
	modified:   arch/x86/configs/dnv-cb2/pt_dev.c
	modified:   arch/x86/configs/dnv-cb2/ve820.c
	modified:   arch/x86/configs/partition_config.c
	modified:   arch/x86/configs/sharing_config.c
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_state_tbl.c
	modified:   arch/x86/e820.c
	modified:   arch/x86/gdt.c
	modified:   arch/x86/init.c
	modified:   arch/x86/ioapic.c
	modified:   arch/x86/irq.c
	modified:   arch/x86/lapic.c
	modified:   arch/x86/mmu.c
	modified:   arch/x86/notify.c
	modified:   arch/x86/page.c
	modified:   arch/x86/pagetable.c
	modified:   arch/x86/static_checks.c
	modified:   arch/x86/timer.c
	modified:   arch/x86/trampoline.c
	modified:   arch/x86/vmx.c
	modified:   arch/x86/vtd.c
	modified:   boot/include/acpi.h
	modified:   include/arch/x86/e820.h
	modified:   include/arch/x86/ioapic.h
2019-02-22 13:14:36 +08:00
Minggui Cao 723ff1f4ee HV: modularization improve UEFI macro control code
1. in UEFI bsp code, not need UEFI macro; it is controlled in makefile.
2. in vm/acpi/interrupt code, unify the API name for SBL & UEFI.
3. remove unnecessary header including and unused code.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-30 16:11:39 +08:00
Shiqing Gao e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Arindam Roy bec21d147b Patch for modularising ioapic.[c/h] and related files.
This adds few functions to access the daata structures
defined inside ioapic.c. Removes the same data structures
from ioapic.h
Also this modifies some of the names of existing APIs to
conform to the ioapic module name.
Modified gsi_table identifier to gs_table_data, to avoid
a MISRA C Violation.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-12-21 09:58:25 +08:00
Yan, Like 530388db30 hv: irq: fix MISRA-C violations in irq.c and idt.h
This commit fixed following violations:
- Procedure has more than one exit point: free_irq_vector/request_irq/dispatch_interrupt
- goto detected: dispatch_interrupt
- Pointer param should be declared pointer to const: fixup_idt
- basic type declaration used: fixup_idt

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:09:31 +08:00
Jason Chen CJ d2bac7cc5d cpu_dead should only run on current pcpu
no need for input param pcpu_id.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-17 14:31:52 +08:00
Jason Chen CJ 27938c3300 move idt fixup out of cpu_primary.S
we will not enable interrupt until interrupt_init, so we can defer idt
fixup and lidt to interrupt_init.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-12 09:07:43 +08:00
Huihuang Shi 42e38dfb53 hv: fix "No prototype for non-static function"
The function not used in extern c file, must add static.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 09:12:49 +08:00
Jason Chen CJ b54f23316a modularization: boot component -- move functions
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch moves set_idt from header file to irq.c

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Huihuang Shi c32d41a0be hv: irq: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Shiqing Gao a931229888 hv: irq: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in irq.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao d97224a4b5 hv: fix integer violations
fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 12:46:34 +08:00
Xiangyang Wu fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Yan, Like 7dc3e609be doc: hv: add comments to irq APIs for documentation
Tracked-On: #1595
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-11-02 15:34:36 -07:00
Minggui Cao b74720636b HV: add size check for shell log buffer usage
add size check for other hypervisor console command;
they could be overflow for shell log buffer output.

Tracked-On: #1587
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-02 09:13:57 +08:00
Chinthapally, Manisha 5985c1216e HV:Added implementation for PMI handler function
irq.c/.h:
	Added new variables(ctx_rflags, ctx_rip, ctx_cs) in irq_desc
	On each interrupt this information is populated
	Added api's to access the irq_desc members

profiling.c:
	profiling_pmi_handler:On each PMI generates gets the context and other information that	caused it

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Chinthapally, Manisha 8ba333d275 HV: Added Initial support for SEP/SOCWATCH profiling
This patch adds support to sep/socwatch profiling
     Adds 2 new files include/arch/x86/profiling.h and arch/x86/profiling.c
     which contains most of the implementation for profiling,most of the functions
     in profiling.c have dummy implementation and will be implemented in next patches

     a. cpu.c, Initial profiling setup is done as part of bsp_boot_post
  and cpu_secondary_post flow
     b. vmcall.c, New ioctl is added for performing profiling related
  operations in vmcall_vmexit_handler
	ioctl - HC_PROFILING_OPS
        function - hcall_profiling_ops()
     c. common/hypercall.c, hcall_profiling_ops() implementation.
     d. hv_main.c, In vcpu_thread calling profiling related functions
  to save vm context
     e. acrn_hv_defs.h, list all the profiling command types

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Huihuang Shi ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00