acrn-config: correct value of DRHDx_IGNORE macro

The DRHDx_IGNORE should be defined to true when DRHD device BDF equal to
the given CONFIG_GPU_SBDF.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Wei Liu 2019-11-05 09:33:39 +08:00 committed by wenlingz
parent dea2e25f41
commit f10c937b40
6 changed files with 11 additions and 7 deletions

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@ -186,6 +186,11 @@ class DmarTbl:
self.path_offset = 0 self.path_offset = 0
# TODO: Get board information is independent part of acrn-config tools, it does not get the GPU_SBDF default
# config from the other part of tools, so hard code the GPU_SBDF to gernerate DRHDx_IGNORE macro
CONFIG_GPU_SBDF = 0x10
class PathDevFun: class PathDevFun:
"""Path Device Function meta data""" """Path Device Function meta data"""
def __init__(self): def __init__(self):
@ -218,9 +223,8 @@ def walk_pci_bus(tmp_pdf, dmar_tbl, dmar_hw_list, n_cnt, drhd_cnt):
dmar_tbl.path_offset += ctypes.sizeof(DevScopePath) dmar_tbl.path_offset += ctypes.sizeof(DevScopePath)
n_cnt -= 1 n_cnt -= 1
# this not support to warning if no dedicated iommu for gpu
if ((dmar_tbl.dmar_drhd.segment << 16) | ( if ((dmar_tbl.dmar_drhd.segment << 16) | (
dmar_tbl.dmar_dev_scope.bus << 8) | scope_path.function) == 0x10: dmar_tbl.dmar_dev_scope.bus << 8) | tmp_pdf.path) == CONFIG_GPU_SBDF:
dmar_hw_list.hw_ignore[drhd_cnt] = 'true' dmar_hw_list.hw_ignore[drhd_cnt] = 'true'
else: else:
dmar_hw_list.hw_ignore[drhd_cnt] = 'false' dmar_hw_list.hw_ignore[drhd_cnt] = 'false'

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@ -200,7 +200,7 @@
#define DRHD0_SEGMENT 0U #define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U #define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED64000UL #define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE false #define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0x0U #define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U #define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD0_DEVSCOPE1_BUS 0x0U #define DRHD0_DEVSCOPE1_BUS 0x0U

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@ -186,7 +186,7 @@
#define DRHD0_SEGMENT 0U #define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U #define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED64000UL #define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE false #define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0x0U #define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U #define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD0_DEVSCOPE1_BUS 0x0U #define DRHD0_DEVSCOPE1_BUS 0x0U

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@ -186,7 +186,7 @@
#define DRHD0_SEGMENT 0U #define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U #define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED64000UL #define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE false #define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0x0U #define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U #define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD0_DEVSCOPE1_BUS 0x0U #define DRHD0_DEVSCOPE1_BUS 0x0U

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@ -138,7 +138,7 @@
#define DRHD0_SEGMENT 0U #define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U #define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED64000UL #define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE false #define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0x0U #define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U #define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD0_DEVSCOPE1_BUS 0x0U #define DRHD0_DEVSCOPE1_BUS 0x0U

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@ -129,7 +129,7 @@
#define DRHD0_SEGMENT 0U #define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U #define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED90000UL #define DRHD0_REG_BASE 0xFED90000UL
#define DRHD0_IGNORE false #define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0x0U #define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U #define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD0_DEVSCOPE1_BUS 0x0U #define DRHD0_DEVSCOPE1_BUS 0x0U