hv: paging: rename ppt_set/clear_ATTR to set_paging_ATTR

Rename ppt_set/clear_(attribute) to set_paging_(attribute)

Tracked-On: #5830
Signed-off-by: Li Fei1 <fei1.li@intel.com>

hypervisor/arch/x86/guest/ept.c

@@ -84,7 +84,7 @@ void reserve_buffer_for_ept_pages(void)
 	uint32_t offset = 0U;
 
 	page_base = e820_alloc_memory(TOTAL_EPT_4K_PAGES_SIZE, ~0UL);
-	ppt_clear_user_bit(page_base, TOTAL_EPT_4K_PAGES_SIZE);
+	set_paging_supervisor(page_base, TOTAL_EPT_4K_PAGES_SIZE);
 	for (vm_id = 0U; vm_id < CONFIG_MAX_VM_NUM; vm_id++) {
 		ept_pages[vm_id] = (struct page *)(void *)(page_base + offset);
 		/* assume each VM has same amount of EPT pages */

hypervisor/arch/x86/ioapic.c

@@ -406,7 +406,7 @@ int32_t init_ioapic_id_info(void)
 		gsi = 0U;
 		for (ioapic_id = 0U; ioapic_id < ioapic_num; ioapic_id++) {
 			addr = map_ioapic(ioapic_array[ioapic_id].addr);
-			ppt_clear_user_bit((uint64_t)addr, PAGE_SIZE);
+			set_paging_supervisor((uint64_t)addr, PAGE_SIZE);
 
 			nr_pins = ioapic_nr_pins(addr);
 			if (nr_pins <= (uint32_t) CONFIG_MAX_IOAPIC_LINES) {

hypervisor/arch/x86/mmu.c

@@ -55,7 +55,7 @@ static uint8_t sanitized_page[PAGE_SIZE] __aligned(PAGE_SIZE);
 static struct page ppt_pages[PPT_PAGE_NUM];
 static uint64_t ppt_page_bitmap[PPT_PAGE_NUM / 64];
 
-/* ppt: pripary page pool */
+/* ppt: primary page pool */
 static struct page_pool ppt_page_pool = {
 	.start_page = ppt_pages,
 	.bitmap_size = PPT_PAGE_NUM / 64,
@@ -191,7 +191,7 @@ void enable_smap(void)
 /*
  * Clean USER bit in page table to update memory pages to be owned by hypervisor.
  */
-void ppt_clear_user_bit(uint64_t base, uint64_t size)
+void set_paging_supervisor(uint64_t base, uint64_t size)
 {
 	uint64_t base_aligned;
 	uint64_t size_aligned;
@@ -205,19 +205,24 @@ void ppt_clear_user_bit(uint64_t base, uint64_t size)
 		round_pde_up(size_aligned), 0UL, PAGE_USER, &ppt_pgtable, MR_MODIFY);
 }
 
-void ppt_set_nx_bit(uint64_t base, uint64_t size, bool add)
+void set_paging_nx(uint64_t base, uint64_t size)
 {
 	uint64_t region_end = base + size;
 	uint64_t base_aligned = round_pde_down(base);
 	uint64_t size_aligned = round_pde_up(region_end - base_aligned);
 
-	if (add) {
-		pgtable_modify_or_del_map((uint64_t *)ppt_mmu_pml4_addr,
-			base_aligned, size_aligned, PAGE_NX, 0UL, &ppt_pgtable, MR_MODIFY);
-	} else {
-		pgtable_modify_or_del_map((uint64_t *)ppt_mmu_pml4_addr,
-			base_aligned, size_aligned, 0UL, PAGE_NX, &ppt_pgtable, MR_MODIFY);
-	}
+	pgtable_modify_or_del_map((uint64_t *)ppt_mmu_pml4_addr,
+		base_aligned, size_aligned, PAGE_NX, 0UL, &ppt_pgtable, MR_MODIFY);
+}
+
+void set_paging_x(uint64_t base, uint64_t size)
+{
+	uint64_t region_end = base + size;
+	uint64_t base_aligned = round_pde_down(base);
+	uint64_t size_aligned = round_pde_up(region_end - base_aligned);
+
+	pgtable_modify_or_del_map((uint64_t *)ppt_mmu_pml4_addr,
+		base_aligned, size_aligned, 0UL, PAGE_NX, &ppt_pgtable, MR_MODIFY);
 }
 
 void init_paging(void)

hypervisor/arch/x86/rtcm.c

@@ -24,11 +24,6 @@ static struct rtct_entry_data_rtcm_binary *rtcm_binary = NULL;
 
 static struct acpi_table_header *acpi_rtct_tbl = NULL;
 
-static inline void rtcm_set_nx(bool add)
-{
-	ppt_set_nx_bit((uint64_t)hpa2hva(rtcm_binary->address), rtcm_binary->size, add);
-}
-
 static inline void rtcm_flush_binary_tlb(void)
 {
 	uint64_t linear_addr, start_addr = (uint64_t)hpa2hva(rtcm_binary->address);
@@ -125,7 +120,7 @@ bool init_software_sram(bool is_bsp)
 			parse_rtct();
 			if (rtcm_binary != NULL) {
 				/* Clear the NX bit of PTCM area */
-				rtcm_set_nx(false);
+				set_paging_x((uint64_t)hpa2hva(rtcm_binary->address), rtcm_binary->size);
 			}
 			bitmap_clear_lock(get_pcpu_id(), &init_sw_sram_cpus_mask);
 		}
@@ -148,7 +143,7 @@ bool init_software_sram(bool is_bsp)
 
 			if (is_bsp) {
 				/* Restore the NX bit of RTCM area in page table */
-				rtcm_set_nx(true);
+				set_paging_nx((uint64_t)hpa2hva(rtcm_binary->address), rtcm_binary->size);
 			}
 
 			bitmap_set_lock(get_pcpu_id(), &init_sw_sram_cpus_mask);

hypervisor/arch/x86/vtd.c

@@ -210,7 +210,7 @@ static int32_t register_hrhd_units(void)
 		drhd_rt->drhd = &platform_dmar_info->drhd_units[i];
 		drhd_rt->dmar_irq = IRQ_INVALID;
 
-		ppt_clear_user_bit(drhd_rt->drhd->reg_base_addr, PAGE_SIZE);
+		set_paging_supervisor(drhd_rt->drhd->reg_base_addr, PAGE_SIZE);
 
 		ret = dmar_register_hrhd(drhd_rt);
 		if (ret != 0) {

hypervisor/debug/npk_log.c

@@ -104,7 +104,7 @@ void npk_log_setup(struct hv_npk_log_param *param)
 				for (i = 0U; i < pcpu_nums; i++) {
 					per_cpu(npk_log_ref, i) = 0U;
 				}
-				ppt_clear_user_bit(base,
+				set_paging_supervisor(base,
 					pcpu_nums * (HV_NPK_LOG_REF_MASK + 1U)
 					* sizeof(struct npk_chan));
 			}

hypervisor/debug/uart16550.c

@@ -133,7 +133,7 @@ void uart16550_init(bool early_boot)
 		if (uart.type == MMIO) {
 			mmio_base_va = hpa2hva(hva2hpa_early(uart.mmio_base_vaddr));
 			if (mmio_base_va != NULL) {
-				ppt_clear_user_bit((uint64_t)mmio_base_va, PDE_SIZE);
+				set_paging_supervisor((uint64_t)mmio_base_va, PDE_SIZE);
 			}
 		}
 		return;

hypervisor/dm/vgpio.c

@@ -142,7 +142,7 @@ void register_vgpio_handler(struct acrn_vm *vm, const struct acrn_mmiodev *mmiod
 	base_hpa    = mmiodev->base_hpa + (P2SB_BASE_GPIO_PORT_ID << P2SB_PORTID_SHIFT);
 
 	/* emulate MMIO access to the GPIO private configuration space registers */
-	ppt_clear_user_bit((uint64_t)hpa2hva(base_hpa), gpio_pcr_sz);
+	set_paging_supervisor((uint64_t)hpa2hva(base_hpa), gpio_pcr_sz);
 	register_mmio_emulation_handler(vm, vgpio_mmio_handler, gpa_start, gpa_end, (void *)vm, false);
 	ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, gpa_start, gpio_pcr_sz);
 }

hypervisor/hw/pci.c

@@ -652,7 +652,7 @@ void init_pci_pdev_list(void)
 	uint16_t bus;
 	bool was_visited = false;
 
-	ppt_clear_user_bit(phys_pci_mmcfg.address, get_pci_mmcfg_size(&phys_pci_mmcfg));
+	set_paging_supervisor(phys_pci_mmcfg.address, get_pci_mmcfg_size(&phys_pci_mmcfg));
 
 	pci_parse_iommu_devscopes(&bdfs_from_drhds, &drhd_idx_pci_all);
 

hypervisor/include/arch/x86/asm/mmu.h

@@ -153,8 +153,13 @@ void enable_smap(void);
  * @return None
  */
 void init_paging(void);
-void ppt_clear_user_bit(uint64_t base, uint64_t size);
-void ppt_set_nx_bit(uint64_t base, uint64_t size, bool add);
+
+/*
+ * set paging attribute for primary page tables
+ */
+void set_paging_supervisor(uint64_t base, uint64_t size);
+void set_paging_x(uint64_t base, uint64_t size);
+void set_paging_nx(uint64_t base, uint64_t size);
 
 /**
  * @brief Specified signle VPID flush