doc: update CR HLD
add missing bits in CR4 virtualization. Tracked-On: #3882 Signed-off-by: Tw <wei.tan@intel.com>
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@ -1047,7 +1047,7 @@ setting.
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are fixed to be 0 under VMX operation
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* - CR4_TRAP_MASK
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- CR4_PSE | CR4_PAE | CR4_VMXE | CR4_PCIDE
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- CR4_PSE | CR4_PAE | CR4_VMXE | CR4_PCIDE | CR4_SMEP | CR4_SMAP | CR4_PKE
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- ACRN will also trap PSE, PAE, VMXE, and PCIDE bits
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* - cr4_host_mask
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