From d14a7dbdd2bd4d545439c65f810e5a4357afca30 Mon Sep 17 00:00:00 2001 From: Jason Chen CJ Date: Mon, 12 Mar 2018 20:57:44 +0800 Subject: [PATCH] retpoline: add indirect thunk support for gcc version > 7.3, enable CONFIG_RETPOLINE Signed-off-by: Jason Chen CJ --- hypervisor/Makefile | 13 +++++ hypervisor/arch/x86/retpoline-thunk.S | 61 +++++++++++++++++++++++ hypervisor/bsp/ld/link_ram.ld.in | 1 + hypervisor/bsp/sbl/include/bsp/bsp_cfg.h | 1 - hypervisor/bsp/uefi/include/bsp/bsp_cfg.h | 1 - 5 files changed, 75 insertions(+), 2 deletions(-) create mode 100644 hypervisor/arch/x86/retpoline-thunk.S diff --git a/hypervisor/Makefile b/hypervisor/Makefile index c35b705b9..3d4e0953b 100644 --- a/hypervisor/Makefile +++ b/hypervisor/Makefile @@ -153,6 +153,19 @@ ifeq ($(PLATFORM),uefi) C_SRCS += bsp/$(PLATFORM)/cmdline.c endif +# retpoline support +ifeq (true, $(shell [ $(GCC_MAJOR) -eq 7 ] && [ $(GCC_MINOR) -ge 3 ] && echo true)) +CFLAGS += -mindirect-branch=thunk-extern -mindirect-branch-register +CFLAGS += -DCONFIG_RETPOLINE +S_SRCS += arch/x86/retpoline-thunk.S +else +ifeq (true, $(shell [ $(GCC_MAJOR) -ge 8 ] && echo true)) +CFLAGS += -mindirect-branch=thunk-extern -mindirect-branch-register +CFLAGS += -DCONFIG_RETPOLINE +S_SRCS += arch/x86/retpoline-thunk.S +endif +endif + C_OBJS := $(patsubst %.c,$(HV_OBJDIR)/%.o,$(C_SRCS)) ifeq ($(RELEASE),0) C_OBJS += $(patsubst %.c,$(HV_OBJDIR)/%.o,$(D_SRCS)) diff --git a/hypervisor/arch/x86/retpoline-thunk.S b/hypervisor/arch/x86/retpoline-thunk.S new file mode 100644 index 000000000..80a88ddb4 --- /dev/null +++ b/hypervisor/arch/x86/retpoline-thunk.S @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2018 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +.macro retpoline_thunk reg:req + +.align 8 +.global __x86_indirect_thunk_\reg +__x86_indirect_thunk_\reg: + call 22f +11: + pause + jmp 11b +22: + mov %\reg, (%rsp) + ret +.endm + +.section .retpoline_thunk, "ax" + + retpoline_thunk rax + retpoline_thunk rbx + retpoline_thunk rcx + retpoline_thunk rdx + retpoline_thunk rdi + retpoline_thunk rsi + retpoline_thunk rbp + retpoline_thunk r8 + retpoline_thunk r9 + retpoline_thunk r10 + retpoline_thunk r11 + retpoline_thunk r12 + retpoline_thunk r13 + retpoline_thunk r14 + retpoline_thunk r15 diff --git a/hypervisor/bsp/ld/link_ram.ld.in b/hypervisor/bsp/ld/link_ram.ld.in index 7e880cdd1..551f1eeec 100644 --- a/hypervisor/bsp/ld/link_ram.ld.in +++ b/hypervisor/bsp/ld/link_ram.ld.in @@ -30,6 +30,7 @@ SECTIONS *(.text .text*) ; *(.gnu.linkonce.t*) *(.note.gnu.build-id) + *(.retpoline_thunk) } > ram .rodata : diff --git a/hypervisor/bsp/sbl/include/bsp/bsp_cfg.h b/hypervisor/bsp/sbl/include/bsp/bsp_cfg.h index 3733b2c77..a10709e88 100644 --- a/hypervisor/bsp/sbl/include/bsp/bsp_cfg.h +++ b/hypervisor/bsp/sbl/include/bsp/bsp_cfg.h @@ -45,5 +45,4 @@ #define CONFIG_LOW_RAM_SIZE 0x000CF000 #define CONFIG_RAM_START 0x6E000000 #define CONFIG_RAM_SIZE 0x02000000 /* 32M */ -#define CONFIG_RETPOLINE #endif /* BSP_CFG_H */ diff --git a/hypervisor/bsp/uefi/include/bsp/bsp_cfg.h b/hypervisor/bsp/uefi/include/bsp/bsp_cfg.h index 96b6a46f3..af9aa15a0 100644 --- a/hypervisor/bsp/uefi/include/bsp/bsp_cfg.h +++ b/hypervisor/bsp/uefi/include/bsp/bsp_cfg.h @@ -48,5 +48,4 @@ #define CONFIG_DMAR_PARSE_ENABLED 1 #define CONFIG_GPU_SBDF 0x00000010 /* 0000:00:02.0 */ #define CONFIG_EFI_STUB 1 -#define CONFIG_RETPOLINE #endif /* BSP_CFG_H */