From b2c6cf7753901bd95b3936f16c91832eaf51a128 Mon Sep 17 00:00:00 2001
From: Yonghua Huang <yonghua.huang@intel.com>
Date: Mon, 24 Feb 2020 20:59:37 +0800
Subject: [PATCH] hv: refine retpoline speculation barriers

  Per Section 4.4 Speculation Barriers, in
  "Retpoline: A Branch Target Inject Mitigation" white paper,
  "LFENCE instruction limits the speculative execution that
  a processor implementation can perform around the LFENCE,
  possibly impacting processor performance,but also creating
  a tool with which to mitigate speculative-execution
  side-channel attacks."

Tracked-On: #4424
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
---
 hypervisor/arch/x86/lib/retpoline-thunk.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hypervisor/arch/x86/lib/retpoline-thunk.S b/hypervisor/arch/x86/lib/retpoline-thunk.S
index 3496e4dd4..44b009d7f 100644
--- a/hypervisor/arch/x86/lib/retpoline-thunk.S
+++ b/hypervisor/arch/x86/lib/retpoline-thunk.S
@@ -12,6 +12,7 @@ __x86_indirect_thunk_\reg:
     call 22f
 11:
     pause
+    lfence
     jmp 11b
 22:
     mov %\reg, (%rsp)