diff --git a/hypervisor/include/arch/x86/guest/gpr.h b/hypervisor/include/arch/x86/guest/gpr.h new file mode 100644 index 000000000..53e60b1c3 --- /dev/null +++ b/hypervisor/include/arch/x86/guest/gpr.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2018 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _VGPR_H_ +#define _VGPR_H_ + +/* General-purpose register layout aligned with the general-purpose register idx + * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. + */ +struct cpu_gp_regs { + uint64_t rax; + uint64_t rcx; + uint64_t rdx; + uint64_t rbx; + uint64_t rsp; + uint64_t rbp; + uint64_t rsi; + uint64_t rdi; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; +}; +#endif diff --git a/hypervisor/include/arch/x86/guest/vcpu.h b/hypervisor/include/arch/x86/guest/vcpu.h index 4212c6f4b..568ec66df 100644 --- a/hypervisor/include/arch/x86/guest/vcpu.h +++ b/hypervisor/include/arch/x86/guest/vcpu.h @@ -50,6 +50,7 @@ #ifndef ASSEMBLER #include +#include enum vcpu_state { VCPU_INIT, @@ -66,28 +67,6 @@ enum vm_cpu_mode { CPU_MODE_64BIT, /* IA-32E mode (CS.L = 1) */ }; -/* General-purpose register layout aligned with the general-purpose register idx - * when vmexit, such as vmexit due to CR access, refer to SMD Vol.3C 27-6. - */ -struct cpu_gp_regs { - uint64_t rax; - uint64_t rcx; - uint64_t rdx; - uint64_t rbx; - uint64_t rsp; - uint64_t rbp; - uint64_t rsi; - uint64_t rdi; - uint64_t r8; - uint64_t r9; - uint64_t r10; - uint64_t r11; - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; -}; - struct segment_sel { uint16_t selector; uint64_t base;