HV: add SDC2 config in hypervisor/arch/x86/Kconfig
Per community requirement;up to three post-launched VM might be needed for some automotive SDC system, so add SDC2 scenario to satisfy this requirement. Tracked-On: #3429 Signed-off-by: fuzhongl <fuzhong.liu@intel.com> Reviewed-by: Victor Sun <victor.sun@intel.com>
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@ -52,6 +52,8 @@ include scripts/kconfig/kconfig.mk
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#initialize scenarios name
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ifeq ($(CONFIG_SDC),y)
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SCENARIO_NAME := sdc
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else ifeq ($(CONFIG_SDC2),y)
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SCENARIO_NAME := sdc2
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else ifeq ($(CONFIG_LOGICAL_PARTITION),y)
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SCENARIO_NAME := logical_partition
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else ifeq ($(CONFIG_INDUSTRY),y)
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@ -10,6 +10,12 @@ config SDC
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SDC (Software Defined Cockpit) is a typical scenario that ACRN supported.
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SDC will have one pre-launched SOS VM and one post-launched VM.
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config SDC2
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bool "Software Defined Cockpit 2"
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help
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SDC2 (Software Defined Cockpit 2) is an extended scenario for automotive SDC system.
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SDC2 will have one pre-launched SOS VM and up to three post-launched VM.
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config LOGICAL_PARTITION
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bool "Logical Partition VMs"
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help
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@ -0,0 +1,86 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <vm_config.h>
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#include <vuart.h>
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struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
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{
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.load_order = SOS_VM,
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.name = "ACRN SOS VM",
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.uuid = {0xdbU, 0xbbU, 0xd4U, 0x34U, 0x7aU, 0x57U, 0x42U, 0x16U, \
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0xa1U, 0x2cU, 0x22U, 0x01U, 0xf1U, 0xabU, 0x02U, 0x40U},
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/* dbbbd434-7a57-4216-a12c-2201f1ab0240 */
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/* Allow SOS to reboot the host since there is supposed to be the highest severity guest */
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.guest_flags = GUEST_FLAG_HIGHEST_SEVERITY,
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.clos = 0U,
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.memory = {
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.start_hpa = 0UL,
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.size = CONFIG_SOS_RAM_SIZE,
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},
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.os_config = {
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.name = "ACRN Service OS",
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.kernel_type = KERNEL_BZIMAGE,
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.kernel_mod_tag = "Linux_bzImage",
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.bootargs = SOS_VM_BOOTARGS,
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},
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = CONFIG_COM_BASE,
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.irq = CONFIG_COM_IRQ,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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}
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},
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{
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.load_order = POST_LAUNCHED_VM,
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.uuid = {0xd2U, 0x79U, 0x54U, 0x38U, 0x25U, 0xd6U, 0x11U, 0xe8U, \
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0x86U, 0x4eU, 0xcbU, 0x7aU, 0x18U, 0xb3U, 0x46U, 0x43U},
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/* d2795438-25d6-11e8-864e-cb7a18b34643 */
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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}
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},
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{
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.load_order = POST_LAUNCHED_VM,
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.uuid = {0x49U, 0x5aU, 0xe2U, 0xe5U, 0x26U, 0x03U, 0x4dU, 0x64U, \
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0xafU, 0x76U, 0xd4U, 0xbcU, 0x5aU, 0x8eU, 0xc0U, 0xe5U},
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/* 495ae2e5-2603-4d64-af76-d4bc5a8ec0e5 */
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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}
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},
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{
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.load_order = POST_LAUNCHED_VM,
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.uuid = {0x38U, 0x15U, 0x88U, 0x21U, 0x52U, 0x08U, 0x40U, 0x05U, \
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0xb7U, 0x2aU, 0x8aU, 0x60U, 0x9eU, 0x41U, 0x90U, 0xd0U},
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/* 38158821-5208-4005-b72a-8a609e4190d0 */
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.vuart[0] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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},
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.vuart[1] = {
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.type = VUART_LEGACY_PIO,
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.addr.port_base = INVALID_COM_BASE,
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}
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}
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};
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@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VM_CONFIGURATIONS_H
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#define VM_CONFIGURATIONS_H
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#include <misc_cfg.h>
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#define CONFIG_MAX_VM_NUM (4U + CONFIG_MAX_KATA_VM_NUM)
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/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
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#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \
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GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)
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#define SOS_VM_BOOTARGS SOS_ROOTFS \
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"rw rootwait " \
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"console=tty0 " \
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SOS_CONSOLE \
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"consoleblank=0 " \
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"no_timer_check " \
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"quiet loglevel=3 " \
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"i915.nuclear_pageflip=1 " \
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"i915.avail_planes_per_pipe=0x01010F " \
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"i915.domain_plane_owners=0x011111110000 " \
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"i915.enable_gvt=1 " \
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SOS_BOOTARGS_DIFF
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#endif /* VM_CONFIGURATIONS_H */
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