HV: support up to 7 post launched VMs for industry scenario

In industry scenario, hypervisor will support 1 post-launched RT VM
and 1 post-launched kata VM and up to 5 post-launched standard VMs;

Tracked-On: #4661

Signed-off-by: Victor Sun <victor.sun@intel.com>

hypervisor/arch/x86/Kconfig

@@ -8,8 +8,9 @@ config SCENARIO
 	  sdc will have one pre-launched SOS VM and one post-launched VM;
 	  sdc2: Extended scenario for automotive Software Defined Cockpit system.
 	  sdc2 will have one pre-launched SOS VM and up to three post-launched VMs;
-	  industry: Typical scenario for industry usage with 3 VMs: one pre-launched SOS VM,
+	  industry: Typical scenario for industry usage with 8 VMs: one pre-launched SOS VM,
-	  one post-launched Standard VM for HMI, one post-launched RT VM for real-time control.
+	  one post-launched KATA VM, one post-launched RT VM for real-time control,
+	  and up to five post-launched Standard VMs;
 	  hybrid: Typical scenario for hybrid usage with 3 VMs: one pre-launched VM,
 	  one pre-launched SOS VM and one post-launched Standard VM;
 	  logical_partition: Typical scenario that run two isolated pre-launched VMs;
@@ -194,8 +195,8 @@ config HV_RAM_START
 
 config HV_RAM_SIZE
 	hex "Size of the RAM region used by the hypervisor"
-	range 0x1000000 0x10000000
+	range 0x1000000 0x20000000
-	default 0x0b800000
+	default 0x14000000
 	help
 	  A 64-bit integer indicating the size of RAM used by the hypervisor.
 	  It is ensured at link time that the footprint of the hypervisor

hypervisor/include/common/vm_uuids.h

@@ -35,6 +35,14 @@
 #define POST_STANDARD_VM_UUID3	{0x38U, 0x15U, 0x88U, 0x21U, 0x52U, 0x08U, 0x40U, 0x05U, \
 				 0xb7U, 0x2aU, 0x8aU, 0x60U, 0x9eU, 0x41U, 0x90U, 0xd0U}
 
+/* a6750180-f87a-48d2-91d9-4e7f62b6519e */
+#define POST_STANDARD_VM_UUID4	{0xa6U, 0x75U, 0x01U, 0x80U, 0xf8U, 0x7aU, 0x48U, 0xd2U, \
+				 0x91U, 0xd9U, 0x4eU, 0x7fU, 0x62U, 0xb6U, 0x51U, 0x9eU}
+
+/* d1816e4a-a9bb-4cb4-a066-3f1a8a5ce73f */
+#define POST_STANDARD_VM_UUID5	{0xd1U, 0x81U, 0x6eU, 0x4aU, 0xa9U, 0xbbU, 0x4cU, 0xb4U, \
+				 0xa0U, 0x66U, 0x3fU, 0x1aU, 0x8aU, 0x5cU, 0xe7U, 0x3fU}
+
 /* 495ae2e5-2603-4d64-af76-d4bc5a8ec0e5 */
 #define	POST_RTVM_UUID1		{0x49U, 0x5aU, 0xe2U, 0xe5U, 0x26U, 0x03U, 0x4dU, 0x64U, \
 				 0xafU, 0x76U, 0xd4U, 0xbcU, 0x5aU, 0x8eU, 0xc0U, 0xe5U}

hypervisor/scenarios/industry/vm_configurations.c

@@ -50,11 +50,9 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
 			.type = VUART_LEGACY_PIO,
 			.addr.port_base = INVALID_COM_BASE,
 		}
-
 	},
 	{	/* VM2 */
 		CONFIG_POST_RT_VM(1),
-		/* The hard RTVM must be launched as VM2 */
 		.guest_flags = 0UL,
 		.vcpu_num = 2U,
 		.vcpu_affinity = VM2_CONFIG_VCPU_AFFINITY,
@@ -71,4 +69,74 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
 			.t_vuart.vuart_id = 1U,
 		},
 	},
+	{	/* VM3 */
+		CONFIG_POST_STD_VM(2),
+		.vcpu_num = 1U,
+		.vcpu_affinity = VM3_CONFIG_VCPU_AFFINITY,
+		.vuart[0] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = COM1_BASE,
+			.irq = COM1_IRQ,
+		},
+		.vuart[1] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = INVALID_COM_BASE,
+		}
+	},
+	{	/* VM4 */
+		CONFIG_POST_STD_VM(3),
+		.vcpu_num = 1U,
+		.vcpu_affinity = VM4_CONFIG_VCPU_AFFINITY,
+		.vuart[0] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = COM1_BASE,
+			.irq = COM1_IRQ,
+		},
+		.vuart[1] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = INVALID_COM_BASE,
+		}
+	},
+	{	/* VM5 */
+		CONFIG_POST_STD_VM(4),
+		.vcpu_num = 1U,
+		.vcpu_affinity = VM5_CONFIG_VCPU_AFFINITY,
+		.vuart[0] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = COM1_BASE,
+			.irq = COM1_IRQ,
+		},
+		.vuart[1] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = INVALID_COM_BASE,
+		}
+	},
+	{	/* VM6 */
+		CONFIG_POST_STD_VM(5),
+		.vcpu_num = 1U,
+		.vcpu_affinity = VM6_CONFIG_VCPU_AFFINITY,
+		.vuart[0] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = COM1_BASE,
+			.irq = COM1_IRQ,
+		},
+		.vuart[1] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = INVALID_COM_BASE,
+		}
+	},
+	{	/* VM7 */
+		CONFIG_KATA_VM(1),
+		.vcpu_num = 1U,
+		.vcpu_affinity = VM7_CONFIG_VCPU_AFFINITY,
+		.vuart[0] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = COM1_BASE,
+			.irq = COM1_IRQ,
+		},
+		.vuart[1] = {
+			.type = VUART_LEGACY_PIO,
+			.addr.port_base = INVALID_COM_BASE,
+		}
+	},
 };

hypervisor/scenarios/industry/vm_configurations.h

@@ -15,8 +15,8 @@
  */
 #define PRE_VM_NUM			0U
 #define SOS_VM_NUM			1U
-#define MAX_POST_VM_NUM			2U
+#define MAX_POST_VM_NUM			7U
-#define CONFIG_MAX_KATA_VM_NUM		0U
+#define CONFIG_MAX_KATA_VM_NUM		1U
 
 /* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
 #define DM_OWNED_GUEST_FLAG_MASK	(GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \
@@ -37,5 +37,10 @@
 
 #define	VM1_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(0U), AFFINITY_CPU(1U)}
 #define	VM2_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(2U), AFFINITY_CPU(3U)}
+#define	VM3_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(1U)}
+#define	VM4_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(1U)}
+#define	VM5_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(1U)}
+#define	VM6_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(1U)}
+#define	VM7_CONFIG_VCPU_AFFINITY	{AFFINITY_CPU(1U)}
 
 #endif /* VM_CONFIGURATIONS_H */