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hv: vmsr: add IA32_MISC_ENABLE to msr store area 

Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Binbin Wu 2019-03-20 16:37:37 +08:00 committed by wenlingz
parent 273381b372
commit 98b3d98ac5
2 changed files with 6 additions and 0 deletions
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5
hypervisor/arch/x86/guest/vmsr.c
View File

@ -332,6 +332,11 @@ static void init_msr_area(struct acrn_vcpu *vcpu)
vcpu->arch.msr_area.guest[MSR_AREA_TSC_AUX].value = vcpu->vcpu_id; vcpu->arch.msr_area.guest[MSR_AREA_TSC_AUX].value = vcpu->vcpu_id;
vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].msr_index = MSR_IA32_TSC_AUX; vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].msr_index = MSR_IA32_TSC_AUX;
vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].value = vcpu->pcpu_id; vcpu->arch.msr_area.host[MSR_AREA_TSC_AUX].value = vcpu->pcpu_id;
vcpu->arch.msr_area.guest[MSR_AREA_IA32_MISC_ENABLE].msr_index = MSR_IA32_MISC_ENABLE;
vcpu->arch.msr_area.guest[MSR_AREA_IA32_MISC_ENABLE].value = msr_read(MSR_IA32_MISC_ENABLE);
vcpu->arch.msr_area.host[MSR_AREA_IA32_MISC_ENABLE].msr_index = MSR_IA32_MISC_ENABLE;
vcpu->arch.msr_area.host[MSR_AREA_IA32_MISC_ENABLE].value = msr_read(MSR_IA32_MISC_ENABLE);
} }
void init_msr_emulation(struct acrn_vcpu *vcpu) void init_msr_emulation(struct acrn_vcpu *vcpu)

1
hypervisor/include/arch/x86/guest/vcpu.h
View File

@ -242,6 +242,7 @@ struct msr_store_entry {
enum { enum {
MSR_AREA_TSC_AUX = 0, MSR_AREA_TSC_AUX = 0,
MSR_AREA_IA32_MISC_ENABLE,
MSR_AREA_COUNT, MSR_AREA_COUNT,
}; };