hv: vmcs: fix MISRA-C violations related to variable scope
This patch fixes the MISRA-C violations in arch/x86/vmcs.c. * add local variable if the input parameter passed by value is changed in function definition * move the variable declaration inside function scope if this variable is only used in one function Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -9,10 +9,8 @@
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#include <hypervisor.h>
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#include <cpu.h>
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static uint64_t cr0_host_mask;
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static uint64_t cr0_always_on_mask;
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static uint64_t cr0_always_off_mask;
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static uint64_t cr4_host_mask;
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static uint64_t cr4_always_on_mask;
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static uint64_t cr4_always_off_mask;
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@ -34,7 +32,9 @@ bool is_vmx_disabled(void)
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static void init_cr0_cr4_host_mask(void)
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{
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static bool inited = false;
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static uint64_t cr0_host_mask, cr4_host_mask;
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uint64_t fixed0, fixed1;
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if (!inited) {
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/* Read the CR0 fixed0 / fixed1 MSR registers */
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fixed0 = msr_read(MSR_IA32_VMX_CR0_FIXED0);
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@ -194,6 +194,7 @@ void vmx_write_cr0(struct acrn_vcpu *vcpu, uint64_t cr0)
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uint32_t entry_ctrls;
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bool old_paging_enabled = is_paging_enabled(vcpu);
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uint64_t cr0_changed_bits = vcpu_get_cr0(vcpu) ^ cr0;
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uint64_t cr0_mask = cr0;
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if (!is_cr0_write_valid(vcpu, cr0)) {
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pr_dbg("Invalid cr0 write operation from guest");
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@ -205,9 +206,9 @@ void vmx_write_cr0(struct acrn_vcpu *vcpu, uint64_t cr0)
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* When loading a control register, reserved bit should always set
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* to the value previously read.
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*/
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cr0 &= ~CR0_RESERVED_MASK;
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cr0_mask &= ~CR0_RESERVED_MASK;
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if (!old_paging_enabled && ((cr0 & CR0_PG) != 0UL)) {
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if (!old_paging_enabled && ((cr0_mask & CR0_PG) != 0UL)) {
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if ((vcpu_get_efer(vcpu) & MSR_IA32_EFER_LME_BIT) != 0UL) {
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/* Enable long mode */
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pr_dbg("VMM: Enable long mode");
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@ -223,7 +224,7 @@ void vmx_write_cr0(struct acrn_vcpu *vcpu, uint64_t cr0)
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} else {
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/* do nothing */
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}
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} else if (old_paging_enabled && ((cr0 & CR0_PG) == 0UL)) {
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} else if (old_paging_enabled && ((cr0_mask & CR0_PG) == 0UL)) {
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if ((vcpu_get_efer(vcpu) & MSR_IA32_EFER_LME_BIT) != 0UL) {
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/* Disable long mode */
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pr_dbg("VMM: Disable long mode");
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@ -242,7 +243,7 @@ void vmx_write_cr0(struct acrn_vcpu *vcpu, uint64_t cr0)
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if ((cr0_changed_bits & (CR0_CD | CR0_NW)) != 0UL) {
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/* No action if only CR0.NW is cr0_changed_bits */
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if ((cr0_changed_bits & CR0_CD) != 0UL) {
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if ((cr0 & CR0_CD) != 0UL) {
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if ((cr0_mask & CR0_CD) != 0UL) {
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/*
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* When the guest requests to set CR0.CD, we don't allow
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* guest's CR0.CD to be actually set, instead, we write guest
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@ -269,18 +270,17 @@ void vmx_write_cr0(struct acrn_vcpu *vcpu, uint64_t cr0)
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/* CR0 has no always off bits, except the always on bits, and reserved
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* bits, allow to set according to guest.
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*/
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cr0_vmx = cr0_always_on_mask | cr0;
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cr0_vmx = cr0_always_on_mask | cr0_mask;
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/* Don't set CD or NW bit to guest */
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cr0_vmx &= ~(CR0_CD | CR0_NW);
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exec_vmwrite(VMX_GUEST_CR0, cr0_vmx & 0xFFFFFFFFUL);
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exec_vmwrite(VMX_CR0_READ_SHADOW, cr0 & 0xFFFFFFFFUL);
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exec_vmwrite(VMX_CR0_READ_SHADOW, cr0_mask & 0xFFFFFFFFUL);
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/* clear read cache, next time read should from VMCS */
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bitmap_clear_lock(CPU_REG_CR0, &vcpu->reg_cached);
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pr_dbg("VMM: Try to write %016llx, allow to write 0x%016llx to CR0",
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cr0, cr0_vmx);
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pr_dbg("VMM: Try to write %016llx, allow to write 0x%016llx to CR0", cr0_mask, cr0_vmx);
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}
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static bool is_cr4_write_valid(struct acrn_vcpu *vcpu, uint64_t cr4)
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