diff --git a/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h b/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
new file mode 100644
index 000000000..f476b2bd0
--- /dev/null
+++ b/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+#define ROOTFS_1		"root=/dev/mmcblk1p1 "
+
+#define SOS_CONSOLE		"console=ttyS2 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h b/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
new file mode 100644
index 000000000..f71fe9d9a
--- /dev/null
+++ b/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+#define ROOTFS_1		"root=/dev/mmcblk0p1 "
+
+#define SOS_CONSOLE		"console=ttyS0 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h b/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
new file mode 100644
index 000000000..67a84f85f
--- /dev/null
+++ b/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+
+#define SOS_CONSOLE		"console=ttyS0 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/arch/x86/configs/generic/misc_cfg.h b/hypervisor/arch/x86/configs/generic/misc_cfg.h
new file mode 100644
index 000000000..f71fe9d9a
--- /dev/null
+++ b/hypervisor/arch/x86/configs/generic/misc_cfg.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+#define ROOTFS_1		"root=/dev/mmcblk0p1 "
+
+#define SOS_CONSOLE		"console=ttyS0 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h b/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
new file mode 100644
index 000000000..67a84f85f
--- /dev/null
+++ b/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+
+#define SOS_CONSOLE		"console=ttyS0 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/arch/x86/configs/nuc7i7bnh/misc_cfg.h b/hypervisor/arch/x86/configs/nuc7i7bnh/misc_cfg.h
new file mode 100644
index 000000000..09144d155
--- /dev/null
+++ b/hypervisor/arch/x86/configs/nuc7i7bnh/misc_cfg.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MISC_CFG_H
+#define MISC_CFG_H
+
+#define ROOTFS_0		"root=/dev/sda3 "
+#define ROOTFS_1		"root=/dev/nvme0n1p3 "
+
+#define SOS_CONSOLE		"console=ttyS0 "
+
+#endif /* MISC_CFG_H */
diff --git a/hypervisor/scenarios/logical_partition/vm_configurations.h b/hypervisor/scenarios/logical_partition/vm_configurations.h
index 064fb8ef8..4336b99ee 100644
--- a/hypervisor/scenarios/logical_partition/vm_configurations.h
+++ b/hypervisor/scenarios/logical_partition/vm_configurations.h
@@ -8,6 +8,7 @@
 #define VM_CONFIGURATIONS_H
 
 #include <pci_devices.h>
+#include <misc_cfg.h>
 
 /* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
 #define DM_OWNED_GUEST_FLAG_MASK	0UL
@@ -28,7 +29,7 @@
 #define VM0_CONFIG_NUM_CPUS			2U
 #define VM0_CONFIG_MEM_START_HPA		0x100000000UL
 #define VM0_CONFIG_MEM_SIZE			0x20000000UL
-#define VM0_CONFIG_OS_BOOTARG_ROOT		"root=/dev/sda3 "
+#define VM0_CONFIG_OS_BOOTARG_ROOT		ROOTFS_0
 #define VM0_CONFIG_OS_BOOTARG_MAXCPUS		"maxcpus=2 "
 #define VM0_CONFIG_OS_BOOTARG_CONSOLE		"console=ttyS0 "
 
@@ -36,7 +37,7 @@
 #define VM1_CONFIG_NUM_CPUS			2U
 #define VM1_CONFIG_MEM_START_HPA		0x120000000UL
 #define VM1_CONFIG_MEM_SIZE			0x20000000UL
-#define VM1_CONFIG_OS_BOOTARG_ROOT		"root=/dev/sda3 "
+#define VM1_CONFIG_OS_BOOTARG_ROOT		ROOTFS_0
 #define VM1_CONFIG_OS_BOOTARG_MAXCPUS		"maxcpus=2 "
 #define VM1_CONFIG_OS_BOOTARG_CONSOLE		"console=ttyS0 "